1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140#ifndef PPC_XIVE_H
141#define PPC_XIVE_H
142
143#include "sysemu/kvm.h"
144#include "hw/sysbus.h"
145#include "hw/ppc/xive_regs.h"
146#include "qom/object.h"
147
148
149
150
151
152typedef struct XiveNotifier XiveNotifier;
153
154#define TYPE_XIVE_NOTIFIER "xive-notifier"
155#define XIVE_NOTIFIER(obj) \
156 INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER)
157typedef struct XiveNotifierClass XiveNotifierClass;
158DECLARE_CLASS_CHECKERS(XiveNotifierClass, XIVE_NOTIFIER,
159 TYPE_XIVE_NOTIFIER)
160
161struct XiveNotifierClass {
162 InterfaceClass parent;
163 void (*notify)(XiveNotifier *xn, uint32_t lisn);
164};
165
166
167
168
169
170#define TYPE_XIVE_SOURCE "xive-source"
171OBJECT_DECLARE_SIMPLE_TYPE(XiveSource, XIVE_SOURCE)
172
173
174
175
176
177#define XIVE_SRC_H_INT_ESB 0x1
178#define XIVE_SRC_STORE_EOI 0x2
179
180struct XiveSource {
181 DeviceState parent;
182
183
184 uint32_t nr_irqs;
185 unsigned long *lsi_map;
186
187
188 uint8_t *status;
189
190
191 uint64_t esb_flags;
192 uint32_t esb_shift;
193 MemoryRegion esb_mmio;
194 MemoryRegion esb_mmio_emulated;
195
196
197 void *esb_mmap;
198 MemoryRegion esb_mmio_kvm;
199
200 XiveNotifier *xive;
201};
202
203
204
205
206
207
208#define XIVE_ESB_4K 12
209#define XIVE_ESB_4K_2PAGE 13
210#define XIVE_ESB_64K 16
211#define XIVE_ESB_64K_2PAGE 17
212
213static inline bool xive_source_esb_has_2page(XiveSource *xsrc)
214{
215 return xsrc->esb_shift == XIVE_ESB_64K_2PAGE ||
216 xsrc->esb_shift == XIVE_ESB_4K_2PAGE;
217}
218
219static inline size_t xive_source_esb_len(XiveSource *xsrc)
220{
221 return (1ull << xsrc->esb_shift) * xsrc->nr_irqs;
222}
223
224
225static inline hwaddr xive_source_esb_page(XiveSource *xsrc, uint32_t srcno)
226{
227 assert(srcno < xsrc->nr_irqs);
228 return (1ull << xsrc->esb_shift) * srcno;
229}
230
231
232static inline hwaddr xive_source_esb_mgmt(XiveSource *xsrc, int srcno)
233{
234 hwaddr addr = xive_source_esb_page(xsrc, srcno);
235
236 if (xive_source_esb_has_2page(xsrc)) {
237 addr += (1 << (xsrc->esb_shift - 1));
238 }
239
240 return addr;
241}
242
243
244
245
246
247
248
249
250
251
252
253
254
255#define XIVE_STATUS_ASSERTED 0x4
256#define XIVE_ESB_VAL_P 0x2
257#define XIVE_ESB_VAL_Q 0x1
258
259#define XIVE_ESB_RESET 0x0
260#define XIVE_ESB_PENDING XIVE_ESB_VAL_P
261#define XIVE_ESB_QUEUED (XIVE_ESB_VAL_P | XIVE_ESB_VAL_Q)
262#define XIVE_ESB_OFF XIVE_ESB_VAL_Q
263
264bool xive_esb_trigger(uint8_t *pq);
265bool xive_esb_eoi(uint8_t *pq);
266uint8_t xive_esb_set(uint8_t *pq, uint8_t value);
267
268
269
270
271
272
273
274
275
276
277
278#define XIVE_ESB_STORE_EOI 0x400
279#define XIVE_ESB_LOAD_EOI 0x000
280#define XIVE_ESB_GET 0x800
281#define XIVE_ESB_SET_PQ_00 0xc00
282#define XIVE_ESB_SET_PQ_01 0xd00
283#define XIVE_ESB_SET_PQ_10 0xe00
284#define XIVE_ESB_SET_PQ_11 0xf00
285
286uint8_t xive_source_esb_get(XiveSource *xsrc, uint32_t srcno);
287uint8_t xive_source_esb_set(XiveSource *xsrc, uint32_t srcno, uint8_t pq);
288
289
290
291
292static inline void xive_source_set_status(XiveSource *xsrc, uint32_t srcno,
293 uint8_t status, bool enable)
294{
295 if (enable) {
296 xsrc->status[srcno] |= status;
297 } else {
298 xsrc->status[srcno] &= ~status;
299 }
300}
301
302static inline void xive_source_set_asserted(XiveSource *xsrc, uint32_t srcno,
303 bool enable)
304{
305 xive_source_set_status(xsrc, srcno, XIVE_STATUS_ASSERTED, enable);
306}
307
308static inline bool xive_source_is_asserted(XiveSource *xsrc, uint32_t srcno)
309{
310 return xsrc->status[srcno] & XIVE_STATUS_ASSERTED;
311}
312
313void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset,
314 Monitor *mon);
315
316static inline bool xive_source_irq_is_lsi(XiveSource *xsrc, uint32_t srcno)
317{
318 assert(srcno < xsrc->nr_irqs);
319 return test_bit(srcno, xsrc->lsi_map);
320}
321
322static inline void xive_source_irq_set_lsi(XiveSource *xsrc, uint32_t srcno)
323{
324 assert(srcno < xsrc->nr_irqs);
325 bitmap_set(xsrc->lsi_map, srcno, 1);
326}
327
328void xive_source_set_irq(void *opaque, int srcno, int val);
329
330
331
332
333
334#define TYPE_XIVE_TCTX "xive-tctx"
335OBJECT_DECLARE_SIMPLE_TYPE(XiveTCTX, XIVE_TCTX)
336
337
338
339
340
341
342
343
344
345#define XIVE_TM_RING_COUNT 4
346#define XIVE_TM_RING_SIZE 0x10
347
348typedef struct XivePresenter XivePresenter;
349
350struct XiveTCTX {
351 DeviceState parent_obj;
352
353 CPUState *cs;
354 qemu_irq hv_output;
355 qemu_irq os_output;
356
357 uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
358
359 XivePresenter *xptr;
360};
361
362static inline uint32_t xive_tctx_word2(uint8_t *ring)
363{
364 return *((uint32_t *) &ring[TM_WORD2]);
365}
366
367
368
369
370typedef struct XiveFabric XiveFabric;
371
372struct XiveRouter {
373 SysBusDevice parent;
374
375 XiveFabric *xfb;
376};
377
378#define TYPE_XIVE_ROUTER "xive-router"
379OBJECT_DECLARE_TYPE(XiveRouter, XiveRouterClass,
380 XIVE_ROUTER)
381
382struct XiveRouterClass {
383 SysBusDeviceClass parent;
384
385
386 int (*get_eas)(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx,
387 XiveEAS *eas);
388 int (*get_end)(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
389 XiveEND *end);
390 int (*write_end)(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
391 XiveEND *end, uint8_t word_number);
392 int (*get_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
393 XiveNVT *nvt);
394 int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
395 XiveNVT *nvt, uint8_t word_number);
396 uint8_t (*get_block_id)(XiveRouter *xrtr);
397};
398
399int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx,
400 XiveEAS *eas);
401int xive_router_get_end(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
402 XiveEND *end);
403int xive_router_write_end(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
404 XiveEND *end, uint8_t word_number);
405int xive_router_get_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
406 XiveNVT *nvt);
407int xive_router_write_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
408 XiveNVT *nvt, uint8_t word_number);
409void xive_router_notify(XiveNotifier *xn, uint32_t lisn);
410
411
412
413
414
415typedef struct XiveTCTXMatch {
416 XiveTCTX *tctx;
417 uint8_t ring;
418} XiveTCTXMatch;
419
420#define TYPE_XIVE_PRESENTER "xive-presenter"
421#define XIVE_PRESENTER(obj) \
422 INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER)
423typedef struct XivePresenterClass XivePresenterClass;
424DECLARE_CLASS_CHECKERS(XivePresenterClass, XIVE_PRESENTER,
425 TYPE_XIVE_PRESENTER)
426
427struct XivePresenterClass {
428 InterfaceClass parent;
429 int (*match_nvt)(XivePresenter *xptr, uint8_t format,
430 uint8_t nvt_blk, uint32_t nvt_idx,
431 bool cam_ignore, uint8_t priority,
432 uint32_t logic_serv, XiveTCTXMatch *match);
433 bool (*in_kernel)(const XivePresenter *xptr);
434};
435
436int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
437 uint8_t format,
438 uint8_t nvt_blk, uint32_t nvt_idx,
439 bool cam_ignore, uint32_t logic_serv);
440bool xive_presenter_notify(XiveFabric *xfb, uint8_t format,
441 uint8_t nvt_blk, uint32_t nvt_idx,
442 bool cam_ignore, uint8_t priority,
443 uint32_t logic_serv);
444
445
446
447
448
449#define TYPE_XIVE_FABRIC "xive-fabric"
450#define XIVE_FABRIC(obj) \
451 INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC)
452typedef struct XiveFabricClass XiveFabricClass;
453DECLARE_CLASS_CHECKERS(XiveFabricClass, XIVE_FABRIC,
454 TYPE_XIVE_FABRIC)
455
456struct XiveFabricClass {
457 InterfaceClass parent;
458 int (*match_nvt)(XiveFabric *xfb, uint8_t format,
459 uint8_t nvt_blk, uint32_t nvt_idx,
460 bool cam_ignore, uint8_t priority,
461 uint32_t logic_serv, XiveTCTXMatch *match);
462};
463
464
465
466
467
468#define TYPE_XIVE_END_SOURCE "xive-end-source"
469OBJECT_DECLARE_SIMPLE_TYPE(XiveENDSource, XIVE_END_SOURCE)
470
471struct XiveENDSource {
472 DeviceState parent;
473
474 uint32_t nr_ends;
475
476
477 uint32_t esb_shift;
478 MemoryRegion esb_mmio;
479
480 XiveRouter *xrtr;
481};
482
483
484
485
486
487
488#define XIVE_PRIORITY_MAX 7
489
490
491
492
493
494
495static inline uint8_t xive_priority_to_ipb(uint8_t priority)
496{
497 return priority > XIVE_PRIORITY_MAX ?
498 0 : 1 << (XIVE_PRIORITY_MAX - priority);
499}
500
501
502
503
504
505
506
507
508
509#define XIVE_TM_HW_PAGE 0x0
510#define XIVE_TM_HV_PAGE 0x1
511#define XIVE_TM_OS_PAGE 0x2
512#define XIVE_TM_USER_PAGE 0x3
513
514void xive_tctx_tm_write(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
515 uint64_t value, unsigned size);
516uint64_t xive_tctx_tm_read(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
517 unsigned size);
518
519void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
520Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp);
521void xive_tctx_reset(XiveTCTX *tctx);
522void xive_tctx_destroy(XiveTCTX *tctx);
523void xive_tctx_ipb_update(XiveTCTX *tctx, uint8_t ring, uint8_t ipb);
524
525
526
527
528
529int kvmppc_xive_source_reset_one(XiveSource *xsrc, int srcno, Error **errp);
530void kvmppc_xive_source_set_irq(void *opaque, int srcno, int val);
531int kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp);
532int kvmppc_xive_cpu_synchronize_state(XiveTCTX *tctx, Error **errp);
533int kvmppc_xive_cpu_get_state(XiveTCTX *tctx, Error **errp);
534int kvmppc_xive_cpu_set_state(XiveTCTX *tctx, Error **errp);
535
536#endif
537