LXR qemu/include/hw/timer/avr

   1/*
   2 * AVR 16-bit timer
   3 *
   4 * Copyright (c) 2018 University of Kent
   5 * Author: Ed Robbins
   6 *
   7 * This library is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU Lesser General Public
   9 * License as published by the Free Software Foundation; either
  10 * version 2.1 of the License, or (at your option) any later version.
  11 *
  12 * This library is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * Lesser General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU Lesser General Public
  18 * License along with this library; if not, see
  19 * <http://www.gnu.org/licenses/lgpl-2.1.html>
  20 */
  21
  22/*
  23 * Driver for 16 bit timers on 8 bit AVR devices.
  24 * Note:
  25 * On ATmega640/V-1280/V-1281/V-2560/V-2561/V timers 1, 3, 4 and 5 are 16 bit
  26 */
  27
  28#ifndef HW_TIMER_AVR_TIMER16_H
  29#define HW_TIMER_AVR_TIMER16_H
  30
  31#include "hw/sysbus.h"
  32#include "qemu/timer.h"
  33#include "qom/object.h"
  34
  35enum NextInterrupt {
  36    OVERFLOW,
  37    COMPA,
  38    COMPB,
  39    COMPC,
  40    CAPT
  41};
  42
  43#define TYPE_AVR_TIMER16 "avr-timer16"
  44OBJECT_DECLARE_SIMPLE_TYPE(AVRTimer16State, AVR_TIMER16)
  45
  46struct AVRTimer16State {
  47    /* <private> */
  48    SysBusDevice parent_obj;
  49
  50    /* <public> */
  51    MemoryRegion iomem;
  52    MemoryRegion imsk_iomem;
  53    MemoryRegion ifr_iomem;
  54    QEMUTimer *timer;
  55    qemu_irq capt_irq;
  56    qemu_irq compa_irq;
  57    qemu_irq compb_irq;
  58    qemu_irq compc_irq;
  59    qemu_irq ovf_irq;
  60
  61    bool enabled;
  62
  63    /* registers */
  64    uint8_t cra;
  65    uint8_t crb;
  66    uint8_t crc;
  67    uint8_t cntl;
  68    uint8_t cnth;
  69    uint8_t icrl;
  70    uint8_t icrh;
  71    uint8_t ocral;
  72    uint8_t ocrah;
  73    uint8_t ocrbl;
  74    uint8_t ocrbh;
  75    uint8_t ocrcl;
  76    uint8_t ocrch;
  77    /*
  78     * Reads and writes to CNT and ICR utilise a bizarre temporary
  79     * register, which we emulate
  80     */
  81    uint8_t rtmp;
  82    uint8_t imsk;
  83    uint8_t ifr;
  84
  85    uint8_t id;
  86    uint64_t cpu_freq_hz;
  87    uint64_t freq_hz;
  88    uint64_t period_ns;
  89    uint64_t reset_time_ns;
  90    enum NextInterrupt next_interrupt;
  91};
  92
  93#endif /* HW_TIMER_AVR_TIMER16_H */
  94