LXR qemu/include/tcg/tcg-ldst.h

   1/*
   2 * Memory helpers that will be used by TCG generated code.
   3 *
   4 * Copyright (c) 2008 Fabrice Bellard
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#ifndef TCG_LDST_H
  26#define TCG_LDST_H 1
  27
  28#ifdef CONFIG_SOFTMMU
  29
  30/* Value zero-extended to tcg register size.  */
  31tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
  32                                     MemOpIdx oi, uintptr_t retaddr);
  33tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
  34                                    MemOpIdx oi, uintptr_t retaddr);
  35tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
  36                                    MemOpIdx oi, uintptr_t retaddr);
  37uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
  38                           MemOpIdx oi, uintptr_t retaddr);
  39tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
  40                                    MemOpIdx oi, uintptr_t retaddr);
  41tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
  42                                    MemOpIdx oi, uintptr_t retaddr);
  43uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
  44                           MemOpIdx oi, uintptr_t retaddr);
  45
  46/* Value sign-extended to tcg register size.  */
  47tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
  48                                     MemOpIdx oi, uintptr_t retaddr);
  49tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
  50                                    MemOpIdx oi, uintptr_t retaddr);
  51tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
  52                                    MemOpIdx oi, uintptr_t retaddr);
  53tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
  54                                    MemOpIdx oi, uintptr_t retaddr);
  55tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
  56                                    MemOpIdx oi, uintptr_t retaddr);
  57
  58void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
  59                        MemOpIdx oi, uintptr_t retaddr);
  60void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
  61                       MemOpIdx oi, uintptr_t retaddr);
  62void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
  63                       MemOpIdx oi, uintptr_t retaddr);
  64void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
  65                       MemOpIdx oi, uintptr_t retaddr);
  66void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
  67                       MemOpIdx oi, uintptr_t retaddr);
  68void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
  69                       MemOpIdx oi, uintptr_t retaddr);
  70void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
  71                       MemOpIdx oi, uintptr_t retaddr);
  72
  73#else
  74
  75void QEMU_NORETURN helper_unaligned_ld(CPUArchState *env, target_ulong addr);
  76void QEMU_NORETURN helper_unaligned_st(CPUArchState *env, target_ulong addr);
  77
  78#endif /* CONFIG_SOFTMMU */
  79#endif /* TCG_LDST_H */
  80