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10#include "qemu/osdep.h"
11#include "cpu.h"
12#include "host-cpu.h"
13#include "kvm-cpu.h"
14#include "qapi/error.h"
15#include "sysemu/sysemu.h"
16#include "hw/boards.h"
17
18#include "kvm_i386.h"
19#include "hw/core/accel-cpu.h"
20
21static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
22{
23 X86CPU *cpu = X86_CPU(cs);
24 CPUX86State *env = &cpu->env;
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41
42 if (cpu->max_features) {
43 if (enable_cpu_pm && kvm_has_waitpkg()) {
44 env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
45 }
46 if (cpu->ucode_rev == 0) {
47 cpu->ucode_rev =
48 kvm_arch_get_supported_msr_feature(kvm_state,
49 MSR_IA32_UCODE_REV);
50 }
51 }
52 return host_cpu_realizefn(cs, errp);
53}
54
55static bool lmce_supported(void)
56{
57 uint64_t mce_cap = 0;
58
59 if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) {
60 return false;
61 }
62 return !!(mce_cap & MCG_LMCE_P);
63}
64
65static void kvm_cpu_max_instance_init(X86CPU *cpu)
66{
67 CPUX86State *env = &cpu->env;
68 KVMState *s = kvm_state;
69
70 host_cpu_max_instance_init(cpu);
71
72 if (lmce_supported()) {
73 object_property_set_bool(OBJECT(cpu), "lmce", true, &error_abort);
74 }
75
76 env->cpuid_min_level =
77 kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
78 env->cpuid_min_xlevel =
79 kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
80 env->cpuid_min_xlevel2 =
81 kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
82}
83
84static void kvm_cpu_xsave_init(void)
85{
86 static bool first = true;
87 KVMState *s = kvm_state;
88 int i;
89
90 if (!first) {
91 return;
92 }
93 first = false;
94
95
96 x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;
97 x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;
98
99 for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {
100 ExtSaveArea *esa = &x86_ext_save_areas[i];
101
102 if (esa->size) {
103 int sz = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EAX);
104 if (sz != 0) {
105 assert(esa->size == sz);
106 esa->offset = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EBX);
107 }
108 }
109 }
110}
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121
122static PropValue kvm_default_props[] = {
123 { "kvmclock", "on" },
124 { "kvm-nopiodelay", "on" },
125 { "kvm-asyncpf", "on" },
126 { "kvm-steal-time", "on" },
127 { "kvm-pv-eoi", "on" },
128 { "kvmclock-stable-bit", "on" },
129 { "x2apic", "on" },
130 { "kvm-msi-ext-dest-id", "off" },
131 { "acpi", "off" },
132 { "monitor", "off" },
133 { "svm", "off" },
134 { NULL, NULL },
135};
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139
140void x86_cpu_change_kvm_default(const char *prop, const char *value)
141{
142 PropValue *pv;
143 for (pv = kvm_default_props; pv->prop; pv++) {
144 if (!strcmp(pv->prop, prop)) {
145 pv->value = value;
146 break;
147 }
148 }
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153
154 assert(pv->prop);
155}
156
157static void kvm_cpu_instance_init(CPUState *cs)
158{
159 X86CPU *cpu = X86_CPU(cs);
160 X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
161
162 host_cpu_instance_init(cpu);
163
164 if (xcc->model) {
165
166 if (!kvm_irqchip_in_kernel()) {
167 x86_cpu_change_kvm_default("x2apic", "off");
168 } else if (kvm_irqchip_is_split() && kvm_enable_x2apic()) {
169 x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on");
170 }
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172
173 x86_cpu_apply_props(cpu, kvm_default_props);
174 }
175
176 if (cpu->max_features) {
177 kvm_cpu_max_instance_init(cpu);
178 }
179
180 kvm_cpu_xsave_init();
181}
182
183static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data)
184{
185 AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
186
187 acc->cpu_realizefn = kvm_cpu_realizefn;
188 acc->cpu_instance_init = kvm_cpu_instance_init;
189}
190static const TypeInfo kvm_cpu_accel_type_info = {
191 .name = ACCEL_CPU_NAME("kvm"),
192
193 .parent = TYPE_ACCEL_CPU,
194 .class_init = kvm_cpu_accel_class_init,
195 .abstract = true,
196};
197static void kvm_cpu_accel_register_types(void)
198{
199 type_register_static(&kvm_cpu_accel_type_info);
200}
201type_init(kvm_cpu_accel_register_types);
202