LXR qemu/tests/tcg/mips/user/ase/dsp/test_dsp_r1_extrv_rs

   1#include<stdio.h>
   2#include<assert.h>
   3
   4int main()
   5{
   6    int rt, rs, ach, acl, dsp;
   7    int result;
   8
   9    rs = 0x03;
  10    ach = 0x05;
  11    acl = 0xB4CB;
  12    result = 0x7FFFFFFF;
  13    __asm
  14        ("wrdsp %1, 0x01\n\t"
  15         "mthi %3, $ac1\n\t"
  16         "mtlo %4, $ac1\n\t"
  17         "extrv_rs.w %0, $ac1, %2\n\t"
  18         "rddsp %1\n\t"
  19         : "=r"(rt), "+r"(dsp)
  20         : "r"(rs), "r"(ach), "r"(acl)
  21        );
  22    dsp = (dsp >> 23) & 0x01;
  23    assert(dsp == 1);
  24    assert(result == rt);
  25
  26    /* Clear dspcontrol */
  27    dsp = 0;
  28    __asm
  29        ("wrdsp %0\n\t"
  30         :
  31         : "r"(dsp)
  32        );
  33
  34    rs = 0x04;
  35    ach = 0x01;
  36    acl = 0xB4CB;
  37    result = 0x10000B4D;
  38    __asm
  39        ("wrdsp %1, 0x01\n\t"
  40         "mthi %3, $ac1\n\t"
  41         "mtlo %4, $ac1\n\t"
  42         "extrv_rs.w %0, $ac1, %2\n\t"
  43         "rddsp %1\n\t"
  44         : "=r"(rt), "+r"(dsp)
  45         : "r"(rs), "r"(ach), "r"(acl)
  46        );
  47    dsp = (dsp >> 23) & 0x01;
  48    assert(dsp == 0);
  49    assert(result == rt);
  50
  51    /* Clear dspcontrol */
  52    dsp = 0;
  53    __asm
  54        ("wrdsp %0\n\t"
  55         :
  56         : "r"(dsp)
  57        );
  58
  59    rs = 0x1F;
  60    ach = 0x3fffffff;
  61    acl = 0x2bcdef01;
  62    result = 0x7ffffffe;
  63    __asm
  64        ("wrdsp %1, 0x01\n\t"
  65         "mthi %3, $ac1\n\t"
  66         "mtlo %4, $ac1\n\t"
  67         "extrv_rs.w %0, $ac1, %2\n\t"
  68         "rddsp %1\n\t"
  69         : "=r"(rt), "+r"(dsp)
  70         : "r"(rs), "r"(ach), "r"(acl)
  71        );
  72    dsp = (dsp >> 23) & 0x01;
  73    assert(dsp == 0);
  74    assert(result == rt);
  75
  76    return 0;
  77}
  78