LXR qemu/tests/tcg/mips/user/ase/msa/shift/test_msa_srl

   1/*
   2 *  Test program for MSA instruction SRL.D
   3 *
   4 *  Copyright (C) 2019  Wave Computing, Inc.
   5 *  Copyright (C) 2019  Aleksandar Markovic <amarkovic@wavecomp.com>
   6 *
   7 *  This program is free software: you can redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License as published by
   9 *  the Free Software Foundation, either version 2 of the License, or
  10 *  (at your option) any later version.
  11 *
  12 *  This program is distributed in the hope that it will be useful,
  13 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 *  GNU General Public License for more details.
  16 *
  17 *  You should have received a copy of the GNU General Public License
  18 *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
  19 *
  20 */
  21
  22#include <sys/time.h>
  23#include <stdint.h>
  24
  25#include "../../../../include/wrappers_msa.h"
  26#include "../../../../include/test_inputs_128.h"
  27#include "../../../../include/test_utils_128.h"
  28
  29#define TEST_COUNT_TOTAL (                                                \
  30            (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \
  31            (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT))
  32
  33
  34int32_t main(void)
  35{
  36    char *isa_ase_name = "MSA";
  37    char *group_name = "Shift";
  38    char *instruction_name =  "SRL.D";
  39    int32_t ret;
  40    uint32_t i, j;
  41    struct timeval start, end;
  42    double elapsed_time;
  43
  44    uint64_t b128_result[TEST_COUNT_TOTAL][2];
  45    uint64_t b128_expect[TEST_COUNT_TOTAL][2] = {
  46        { 0x0000000000000001ULL, 0x0000000000000001ULL, },    /*   0  */
  47        { 0xffffffffffffffffULL, 0xffffffffffffffffULL, },
  48        { 0x00000000003fffffULL, 0x00000000003fffffULL, },
  49        { 0x000007ffffffffffULL, 0x000007ffffffffffULL, },
  50        { 0x000fffffffffffffULL, 0x000fffffffffffffULL, },
  51        { 0x0000000000001fffULL, 0x0000000000001fffULL, },
  52        { 0x0003ffffffffffffULL, 0x000000001fffffffULL, },
  53        { 0x0000000000007fffULL, 0x0000000fffffffffULL, },
  54        { 0x0000000000000000ULL, 0x0000000000000000ULL, },    /*   8  */
  55        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  56        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  57        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  58        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  59        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  60        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  61        { 0x0000000000000000ULL, 0x0000000000000000ULL, },
  62        { 0x0000000000000001ULL, 0x0000000000000001ULL, },    /*  16  */
  63        { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, },
  64        { 0x00000000002aaaaaULL, 0x00000000002aaaaaULL, },
  65        { 0x0000055555555555ULL, 0x0000055555555555ULL, },
  66        { 0x000aaaaaaaaaaaaaULL, 0x000aaaaaaaaaaaaaULL, },
  67        { 0x0000000000001555ULL, 0x0000000000001555ULL, },
  68        { 0x0002aaaaaaaaaaaaULL, 0x0000000015555555ULL, },
  69        { 0x0000000000005555ULL, 0x0000000aaaaaaaaaULL, },
  70        { 0x0000000000000000ULL, 0x0000000000000000ULL, },    /*  24  */
  71        { 0x5555555555555555ULL, 0x5555555555555555ULL, },
  72        { 0x0000000000155555ULL, 0x0000000000155555ULL, },
  73        { 0x000002aaaaaaaaaaULL, 0x000002aaaaaaaaaaULL, },
  74        { 0x0005555555555555ULL, 0x0005555555555555ULL, },
  75        { 0x0000000000000aaaULL, 0x0000000000000aaaULL, },
  76        { 0x0001555555555555ULL, 0x000000000aaaaaaaULL, },
  77        { 0x0000000000002aaaULL, 0x0000000555555555ULL, },
  78        { 0x0000000000000001ULL, 0x0000000000000001ULL, },    /*  32  */
  79        { 0xccccccccccccccccULL, 0xccccccccccccccccULL, },
  80        { 0x0000000000333333ULL, 0x0000000000333333ULL, },
  81        { 0x0000066666666666ULL, 0x0000066666666666ULL, },
  82        { 0x000cccccccccccccULL, 0x000cccccccccccccULL, },
  83        { 0x0000000000001999ULL, 0x0000000000001999ULL, },
  84        { 0x0003333333333333ULL, 0x0000000019999999ULL, },
  85        { 0x0000000000006666ULL, 0x0000000cccccccccULL, },
  86        { 0x0000000000000000ULL, 0x0000000000000000ULL, },    /*  40  */
  87        { 0x3333333333333333ULL, 0x3333333333333333ULL, },
  88        { 0x00000000000cccccULL, 0x00000000000cccccULL, },
  89        { 0x0000019999999999ULL, 0x0000019999999999ULL, },
  90        { 0x0003333333333333ULL, 0x0003333333333333ULL, },
  91        { 0x0000000000000666ULL, 0x0000000000000666ULL, },
  92        { 0x0000ccccccccccccULL, 0x0000000006666666ULL, },
  93        { 0x0000000000001999ULL, 0x0000000333333333ULL, },
  94        { 0x0000000000000001ULL, 0x0000000000000000ULL, },    /*  48  */
  95        { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, },
  96        { 0x000000000038e38eULL, 0x00000000000e38e3ULL, },
  97        { 0x0000071c71c71c71ULL, 0x000001c71c71c71cULL, },
  98        { 0x000e38e38e38e38eULL, 0x00038e38e38e38e3ULL, },
  99        { 0x0000000000001c71ULL, 0x000000000000071cULL, },
 100        { 0x00038e38e38e38e3ULL, 0x00000000071c71c7ULL, },
 101        { 0x00000000000071c7ULL, 0x000000038e38e38eULL, },
 102        { 0x0000000000000000ULL, 0x0000000000000001ULL, },    /*  56  */
 103        { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, },
 104        { 0x0000000000071c71ULL, 0x000000000031c71cULL, },
 105        { 0x000000e38e38e38eULL, 0x00000638e38e38e3ULL, },
 106        { 0x0001c71c71c71c71ULL, 0x000c71c71c71c71cULL, },
 107        { 0x000000000000038eULL, 0x00000000000018e3ULL, },
 108        { 0x000071c71c71c71cULL, 0x0000000018e38e38ULL, },
 109        { 0x0000000000000e38ULL, 0x0000000c71c71c71ULL, },
 110        { 0x886ae6cc28625540ULL, 0x0004b670b5efe7bbULL, },    /*  64  */
 111        { 0x00886ae6cc286255ULL, 0x0000000000000004ULL, },
 112        { 0x886ae6cc28625540ULL, 0x000004b670b5efe7ULL, },
 113        { 0x000221ab9b30a189ULL, 0x000000004b670b5eULL, },
 114        { 0xfbbe00634d93c708ULL, 0x00012f7bb1a153f5ULL, },
 115        { 0x00fbbe00634d93c7ULL, 0x0000000000000001ULL, },
 116        { 0xfbbe00634d93c708ULL, 0x0000012f7bb1a153ULL, },
 117        { 0x0003eef8018d364fULL, 0x0000000012f7bb1aULL, },
 118        { 0xac5aaeaab9cf8b80ULL, 0x00027d8c6ffab2b2ULL, },    /*  72  */
 119        { 0x00ac5aaeaab9cf8bULL, 0x0000000000000002ULL, },
 120        { 0xac5aaeaab9cf8b80ULL, 0x0000027d8c6ffab2ULL, },
 121        { 0x0002b16abaaae73eULL, 0x0000000027d8c6ffULL, },
 122        { 0x704f164d5e31e24eULL, 0x0008df188d8a942eULL, },
 123        { 0x00704f164d5e31e2ULL, 0x0000000000000008ULL, },
 124        { 0x704f164d5e31e24eULL, 0x000008df188d8a94ULL, },
 125        { 0x0001c13c593578c7ULL, 0x000000008df188d8ULL, },
 126    };
 127
 128    reset_msa_registers();
 129
 130    gettimeofday(&start, NULL);
 131
 132    for (i = 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) {
 133        for (j = 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) {
 134            do_msa_SRL_D(b128_pattern[i], b128_pattern[j],
 135                         b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]);
 136        }
 137    }
 138
 139    for (i = 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) {
 140        for (j = 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) {
 141            do_msa_SRL_D(b128_random[i], b128_random[j],
 142                         b128_result[((PATTERN_INPUTS_SHORT_COUNT) *
 143                                      (PATTERN_INPUTS_SHORT_COUNT)) +
 144                                     RANDOM_INPUTS_SHORT_COUNT * i + j]);
 145        }
 146    }
 147
 148    gettimeofday(&end, NULL);
 149
 150    elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
 151    elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
 152
 153    ret = check_results_128(isa_ase_name, group_name, instruction_name,
 154                            TEST_COUNT_TOTAL, elapsed_time,
 155                            &b128_result[0][0], &b128_expect[0][0]);
 156
 157    return ret;
 158}
 159