1/* 2 * (C) Copyright 2000-2005 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#include <common.h> 25#include <asm/processor.h> 26#include <asm/io.h> 27 28long int spd_sdram(void); 29 30int board_early_init_f(void) 31{ 32 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ 33 mtdcr(uicer, 0x00000000); /* disable all ints */ 34 mtdcr(uiccr, 0x00000010); 35 mtdcr(uicpr, 0xFFFF7FF0); /* set int polarities */ 36 mtdcr(uictr, 0x00000010); /* set int trigger levels */ 37 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ 38 39 /* 40 * Configure CPC0_PCI to enable PerWE as output 41 * and enable the internal PCI arbiter if selected 42 */ 43 if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB) 44 mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN); 45 else 46 mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN); 47 48 return 0; 49} 50 51/* 52 * Check Board Identity: 53 */ 54int checkboard(void) 55{ 56 char *s = getenv("serial#"); 57 58 puts("Board: Bubinga - AMCC PPC405EP Evaluation Board"); 59 60 if (s != NULL) { 61 puts(", serial# "); 62 puts(s); 63 } 64 putc('\n'); 65 66 return (0); 67} 68 69/* ------------------------------------------------------------------------- 70 initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of 71 the necessary info for SDRAM controller configuration 72 ------------------------------------------------------------------------- */ 73phys_size_t initdram(int board_type) 74{ 75 long int ret; 76 77 ret = spd_sdram(); 78 return ret; 79} 80