1/* 2 * (C) Copyright 2002 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Marius Groeger <mgroeger@sysgo.de> 5 * 6 * (C) Copyright 2002 7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> 8 * 9 * (C) Copyright 2008 10 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31#include <common.h> 32#include <s3c6400.h> 33 34/* ------------------------------------------------------------------------- */ 35#define CS8900_Tacs 0x0 /* 0clk address set-up */ 36#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */ 37#define CS8900_Tacc 0xE /* 14clk access cycle */ 38#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */ 39#define CS8900_Tah 0x4 /* 4clk address holding time */ 40#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */ 41#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */ 42 43static inline void delay(unsigned long loops) 44{ 45 __asm__ volatile ("1:\n" "subs %0, %1, #1\n" 46 "bne 1b" 47 : "=r" (loops) : "0" (loops)); 48} 49 50/* 51 * Miscellaneous platform dependent initialisations 52 */ 53 54static void cs8900_pre_init(void) 55{ 56 SROM_BW_REG &= ~(0xf << 4); 57 SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4); 58 SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) + 59 (CS8900_Tacc << 16) + (CS8900_Tcoh << 12) + 60 (CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC); 61} 62 63int board_init(void) 64{ 65 DECLARE_GLOBAL_DATA_PTR; 66 67 cs8900_pre_init(); 68 69 /* NOR-flash in SROM0 */ 70 71 /* Enable WAIT */ 72 SROM_BW_REG |= 4 | 8 | 1; 73 74 gd->bd->bi_arch_number = MACH_TYPE; 75 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 76 77 return 0; 78} 79 80int dram_init(void) 81{ 82 DECLARE_GLOBAL_DATA_PTR; 83 84 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 85 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 86 87 return 0; 88} 89 90#ifdef CONFIG_DISPLAY_BOARDINFO 91int checkboard(void) 92{ 93 printf("Board: SMDK6400\n"); 94 return 0; 95} 96#endif 97 98#ifdef CONFIG_ENABLE_MMU 99ulong virt_to_phy_smdk6400(ulong addr) 100{ 101 if ((0xc0000000 <= addr) && (addr < 0xc8000000)) 102 return addr - 0xc0000000 + 0x50000000; 103 else 104 printf("do not support this address : %08lx\n", addr); 105 106 return addr; 107} 108#endif 109 110#if defined(CONFIG_CMD_NAND) && defined(CONFIG_SYS_NAND_LEGACY) 111#include <linux/mtd/nand.h> 112extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; 113void nand_init(void) 114{ 115 nand_probe(CONFIG_SYS_NAND_BASE); 116 if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) 117 print_size(nand_dev_desc[0].totlen, "\n"); 118} 119#endif 120 121ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info) 122{ 123 if (banknum == 0) { /* non-CFI boot flash */ 124 info->portwidth = FLASH_CFI_16BIT; 125 info->chipwidth = FLASH_CFI_BY16; 126 info->interface = FLASH_CFI_X16; 127 return 1; 128 } else 129 return 0; 130} 131