LXR uboot/include/asm-mips/addrspace.h

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 1996, 99 Ralf Baechle
   7 * Copyright (C) 2000, 2002  Maciej W. Rozycki
   8 * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
   9 */
  10#ifndef _ASM_ADDRSPACE_H
  11#define _ASM_ADDRSPACE_H
  12
  13/*
  14 *  Configure language
  15 */
  16#ifdef __ASSEMBLY__
  17#define _ATYPE_
  18#define _ATYPE32_
  19#define _ATYPE64_
  20#define _CONST64_(x)    x
  21#else
  22#define _ATYPE_         __PTRDIFF_TYPE__
  23#define _ATYPE32_       int
  24#define _ATYPE64_       __s64
  25#ifdef CONFIG_64BIT
  26#define _CONST64_(x)    x ## L
  27#else
  28#define _CONST64_(x)    x ## LL
  29#endif
  30#endif
  31
  32/*
  33 *  32-bit MIPS address spaces
  34 */
  35#ifdef __ASSEMBLY__
  36#define _ACAST32_
  37#define _ACAST64_
  38#else
  39#define _ACAST32_               (_ATYPE_)(_ATYPE32_)    /* widen if necessary */
  40#define _ACAST64_               (_ATYPE64_)             /* do _not_ narrow */
  41#endif
  42
  43/*
  44 * Returns the kernel segment base of a given address
  45 */
  46#define KSEGX(a)                ((_ACAST32_ (a)) & 0xe0000000)
  47
  48/*
  49 * Returns the physical address of a CKSEGx / XKPHYS address
  50 */
  51#define CPHYSADDR(a)            ((_ACAST32_(a)) & 0x1fffffff)
  52#define XPHYSADDR(a)            ((_ACAST64_(a)) &                       \
  53                                 _CONST64_(0x000000ffffffffff))
  54
  55#ifdef CONFIG_64BIT
  56
  57/*
  58 * Memory segments (64bit kernel mode addresses)
  59 * The compatibility segments use the full 64-bit sign extended value.  Note
  60 * the R8000 doesn't have them so don't reference these in generic MIPS code.
  61 */
  62#define XKUSEG                  _CONST64_(0x0000000000000000)
  63#define XKSSEG                  _CONST64_(0x4000000000000000)
  64#define XKPHYS                  _CONST64_(0x8000000000000000)
  65#define XKSEG                   _CONST64_(0xc000000000000000)
  66#define CKSEG0                  _CONST64_(0xffffffff80000000)
  67#define CKSEG1                  _CONST64_(0xffffffffa0000000)
  68#define CKSSEG                  _CONST64_(0xffffffffc0000000)
  69#define CKSEG3                  _CONST64_(0xffffffffe0000000)
  70
  71#define CKSEG0ADDR(a)           (CPHYSADDR(a) | CKSEG0)
  72#define CKSEG1ADDR(a)           (CPHYSADDR(a) | CKSEG1)
  73#define CKSEG2ADDR(a)           (CPHYSADDR(a) | CKSEG2)
  74#define CKSEG3ADDR(a)           (CPHYSADDR(a) | CKSEG3)
  75
  76#else
  77
  78#define CKSEG0ADDR(a)           (CPHYSADDR(a) | KSEG0)
  79#define CKSEG1ADDR(a)           (CPHYSADDR(a) | KSEG1)
  80#define CKSEG2ADDR(a)           (CPHYSADDR(a) | KSEG2)
  81#define CKSEG3ADDR(a)           (CPHYSADDR(a) | KSEG3)
  82
  83/*
  84 * Map an address to a certain kernel segment
  85 */
  86#define KSEG0ADDR(a)            (CPHYSADDR(a) | KSEG0)
  87#define KSEG1ADDR(a)            (CPHYSADDR(a) | KSEG1)
  88#define KSEG2ADDR(a)            (CPHYSADDR(a) | KSEG2)
  89#define KSEG3ADDR(a)            (CPHYSADDR(a) | KSEG3)
  90
  91/*
  92 * Memory segments (32bit kernel mode addresses)
  93 * These are the traditional names used in the 32-bit universe.
  94 */
  95#define KUSEG                   0x00000000
  96#define KSEG0                   0x80000000
  97#define KSEG1                   0xa0000000
  98#define KSEG2                   0xc0000000
  99#define KSEG3                   0xe0000000
 100
 101#define CKUSEG                  0x00000000
 102#define CKSEG0                  0x80000000
 103#define CKSEG1                  0xa0000000
 104#define CKSEG2                  0xc0000000
 105#define CKSEG3                  0xe0000000
 106
 107#endif
 108
 109/*
 110 * Cache modes for XKPHYS address conversion macros
 111 */
 112#define K_CALG_COH_EXCL1_NOL2   0
 113#define K_CALG_COH_SHRL1_NOL2   1
 114#define K_CALG_UNCACHED         2
 115#define K_CALG_NONCOHERENT      3
 116#define K_CALG_COH_EXCL         4
 117#define K_CALG_COH_SHAREABLE    5
 118#define K_CALG_NOTUSED          6
 119#define K_CALG_UNCACHED_ACCEL   7
 120
 121/*
 122 * 64-bit address conversions
 123 */
 124#define PHYS_TO_XKSEG_UNCACHED(p)       PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
 125#define PHYS_TO_XKSEG_CACHED(p)         PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
 126#define XKPHYS_TO_PHYS(p)               ((p) & TO_PHYS_MASK)
 127#define PHYS_TO_XKPHYS(cm, a)           (_CONST64_(0x8000000000000000) | \
 128                                         (_CONST64_(cm) << 59) | (a))
 129
 130/*
 131 * Returns the uncached address of a sdram address
 132 */
 133#ifndef __ASSEMBLY__
 134#if defined(CONFIG_SOC_AU1X00) || defined(CONFIG_TB0229)
 135/* We use a 36 bit physical address map here and
 136   cannot access physical memory directly from core */
 137#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
 138#else   /* !CONFIG_SOC_AU1X00 */
 139#define UNCACHED_SDRAM(a) KSEG1ADDR(a)
 140#endif  /* CONFIG_SOC_AU1X00 */
 141#endif  /* __ASSEMBLY__ */
 142
 143/*
 144 * The ultimate limited of the 64-bit MIPS architecture:  2 bits for selecting
 145 * the region, 3 bits for the CCA mode.  This leaves 59 bits of which the
 146 * R8000 implements most with its 48-bit physical address space.
 147 */
 148#define TO_PHYS_MASK    _CONST64_(0x07ffffffffffffff)   /* 2^^59 - 1 */
 149
 150#ifndef CONFIG_CPU_R8000
 151
 152/*
 153 * The R8000 doesn't have the 32-bit compat spaces so we don't define them
 154 * in order to catch bugs in the source code.
 155 */
 156
 157#define COMPAT_K1BASE32         _CONST64_(0xffffffffa0000000)
 158#define PHYS_TO_COMPATK1(x)     ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
 159
 160#endif
 161
 162#define KDM_TO_PHYS(x)          (_ACAST64_ (x) & TO_PHYS_MASK)
 163#define PHYS_TO_K0(x)           (_ACAST64_ (x) | CAC_BASE)
 164
 165#endif /* _ASM_ADDRSPACE_H */
 166