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33
34#ifndef __CONFIG_H
35#define __CONFIG_H
36
37
38#define CONFIG_BOOKE 1
39#define CONFIG_E500 1
40#define CONFIG_MPC85xx 1
41#define CONFIG_MPC8540 1
42#define CONFIG_PM854 1
43
44#define CONFIG_PCI
45#define CONFIG_TSEC_ENET
46#define CONFIG_ENV_OVERWRITE
47
48#define CONFIG_FSL_LAW 1
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64#ifndef CONFIG_SYS_CLK_FREQ
65#define CONFIG_SYS_CLK_FREQ 66000000
66#endif
67
68
69
70
71
72#define CONFIG_L2_CACHE
73#define CONFIG_BTB
74
75#define CONFIG_BOARD_EARLY_INIT_F 1
76
77#undef CONFIG_SYS_DRAM_TEST
78#define CONFIG_SYS_MEMTEST_START 0x00200000
79#define CONFIG_SYS_MEMTEST_END 0x00400000
80
81
82
83
84
85
86#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
87#define CONFIG_SYS_CCSRBAR 0xe0000000
88#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
89#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
90
91
92
93#define CONFIG_FSL_DDR1
94#undef CONFIG_FSL_DDR_INTERACTIVE
95#undef CONFIG_SPD_EEPROM
96#undef CONFIG_DDR_SPD
97#define CONFIG_DDR_DLL
98#define CONFIG_DDR_ECC
99
100#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
101
102#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
103#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
104#define CONFIG_VERY_BIG_RAM
105
106#define CONFIG_NUM_DDR_CONTROLLERS 1
107#define CONFIG_DIMM_SLOTS_PER_CTLR 1
108#define CONFIG_CHIP_SELECTS_PER_CTRL 2
109
110
111#define SPD_EEPROM_ADDRESS 0x58
112
113
114#define CONFIG_SYS_SDRAM_SIZE 256
115#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f
116#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000102
117#define CONFIG_SYS_DDR_TIMING_1 0x47444321
118#define CONFIG_SYS_DDR_TIMING_2 0x00000800
119#define CONFIG_SYS_DDR_CONTROL 0xc2008000
120#define CONFIG_SYS_DDR_MODE 0x00000062
121#define CONFIG_SYS_DDR_INTERVAL 0x045b0100
122
123
124
125
126#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
127#define CONFIG_SYS_LBC_SDRAM_SIZE 0
128
129#define CONFIG_SYS_FLASH_BASE 0xfe000000
130#define CONFIG_SYS_BR0_PRELIM 0xfe001801
131
132#define CONFIG_SYS_OR0_PRELIM 0xfe006f67
133#define CONFIG_SYS_MAX_FLASH_BANKS 1
134#define CONFIG_SYS_MAX_FLASH_SECT 128
135#undef CONFIG_SYS_FLASH_CHECKSUM
136#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
137#define CONFIG_SYS_FLASH_WRITE_TOUT 500
138
139#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
140
141
142#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
143#define CONFIG_SYS_RAMBOOT
144#else
145#undef CONFIG_SYS_RAMBOOT
146#endif
147
148#define CONFIG_FLASH_CFI_DRIVER
149#define CONFIG_SYS_FLASH_CFI
150#define CONFIG_SYS_FLASH_EMPTY_INFO
151
152#undef CONFIG_CLOCKS_IN_MHZ
153
154
155
156
157#define CONFIG_SYS_LBC_LCRR 0x00030004
158#define CONFIG_SYS_LBC_LBCR 0x00000000
159#define CONFIG_SYS_LBC_LSRT 0x20000000
160#define CONFIG_SYS_LBC_MRTPR 0x20000000
161
162
163#define CONFIG_SYS_INIT_RAM_LOCK 1
164#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
165#define CONFIG_SYS_INIT_RAM_END 0x4000
166
167#define CONFIG_SYS_GBL_DATA_SIZE 128
168#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
169#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
170
171#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
172#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
173
174
175#define CONFIG_CONS_INDEX 1
176#undef CONFIG_SERIAL_SOFTWARE_FIFO
177#define CONFIG_SYS_NS16550
178#define CONFIG_SYS_NS16550_SERIAL
179#define CONFIG_SYS_NS16550_REG_SIZE 1
180#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
181
182#define CONFIG_SYS_BAUDRATE_TABLE \
183 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
184
185#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
186#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
187
188
189#define CONFIG_SYS_HUSH_PARSER
190#ifdef CONFIG_SYS_HUSH_PARSER
191#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
192#endif
193
194
195
196
197#define CONFIG_FSL_I2C
198#define CONFIG_HARD_I2C
199#undef CONFIG_SOFT_I2C
200#define CONFIG_SYS_I2C_SPEED 400000
201#define CONFIG_SYS_I2C_SLAVE 0x7F
202#define CONFIG_SYS_I2C_NOPROBES {0x69}
203#define CONFIG_SYS_I2C_OFFSET 0x3000
204
205
206
207
208#define CONFIG_SYS_I2C_EEPROM_ADDR 0x58
209#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
210#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
211#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
212
213
214
215
216#define CONFIG_RTC_PCF8563
217#define CONFIG_SYS_I2C_RTC_ADDR 0x51
218
219
220#define CONFIG_SYS_RIO_MEM_BASE 0xc0000000
221#define CONFIG_SYS_RIO_MEM_PHYS CONFIG_SYS_RIO_MEM_BASE
222#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000
223
224
225
226
227
228#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
229#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
230#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
231#define CONFIG_SYS_PCI1_IO_BASE 0xe2000000
232#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE
233#define CONFIG_SYS_PCI1_IO_SIZE 0x1000000
234
235#if defined(CONFIG_PCI)
236
237#define CONFIG_NET_MULTI
238#define CONFIG_PCI_PNP
239
240#define CONFIG_EEPRO100
241#define CONFIG_E1000
242#undef CONFIG_TULIP
243
244#if !defined(CONFIG_PCI_PNP)
245 #define PCI_ENET0_IOADDR 0xe0000000
246 #define PCI_ENET0_MEMADDR 0xe0000000
247 #define PCI_IDSEL_NUMBER 0x0c
248#endif
249
250#undef CONFIG_PCI_SCAN_SHOW
251#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
252
253#endif
254
255
256#if defined(CONFIG_TSEC_ENET)
257
258#ifndef CONFIG_NET_MULTI
259#define CONFIG_NET_MULTI 1
260#endif
261
262#define CONFIG_MII 1
263#define CONFIG_TSEC1 1
264#define CONFIG_TSEC1_NAME "TSEC0"
265#define CONFIG_TSEC2 1
266#define CONFIG_TSEC2_NAME "TSEC1"
267#define TSEC1_PHY_ADDR 0
268#define TSEC2_PHY_ADDR 1
269#define TSEC1_PHYIDX 0
270#define TSEC2_PHYIDX 0
271#define TSEC1_FLAGS TSEC_GIGABIT
272#define TSEC2_FLAGS TSEC_GIGABIT
273
274#define CONFIG_MPC85XX_FEC 1
275#define CONFIG_MPC85XX_FEC_NAME "FEC"
276#define FEC_PHY_ADDR 3
277#define FEC_PHYIDX 0
278#define FEC_FLAGS 0
279
280
281#define CONFIG_ETHPRIME "TSEC0"
282
283#define CONFIG_HAS_ETH0
284#define CONFIG_HAS_ETH1 1
285#define CONFIG_HAS_ETH2 1
286
287#endif
288
289
290
291
292
293#ifndef CONFIG_SYS_RAMBOOT
294 #define CONFIG_ENV_IS_IN_FLASH 1
295 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x80000)
296 #define CONFIG_ENV_SECT_SIZE 0x40000
297 #define CONFIG_ENV_SIZE 0x2000
298#else
299 #define CONFIG_SYS_NO_FLASH 1
300 #define CONFIG_ENV_IS_NOWHERE 1
301 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
302 #define CONFIG_ENV_SIZE 0x2000
303#endif
304
305#define CONFIG_LOADS_ECHO 1
306#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
307
308
309
310
311
312#define CONFIG_BOOTP_BOOTFILESIZE
313#define CONFIG_BOOTP_BOOTPATH
314#define CONFIG_BOOTP_GATEWAY
315#define CONFIG_BOOTP_HOSTNAME
316
317
318
319
320
321#include <config_cmd_default.h>
322
323#define CONFIG_CMD_PING
324#define CONFIG_CMD_I2C
325#define CONFIG_CMD_MII
326#define CONFIG_CMD_DATE
327#define CONFIG_CMD_EEPROM
328
329#if defined(CONFIG_PCI)
330 #define CONFIG_CMD_PCI
331#endif
332
333#if defined(CONFIG_SYS_RAMBOOT)
334 #undef CONFIG_CMD_ENV
335 #undef CONFIG_CMD_LOADS
336#endif
337
338
339#undef CONFIG_WATCHDOG
340
341
342
343
344#define CONFIG_SYS_LONGHELP
345#define CONFIG_SYS_LOAD_ADDR 0x2000000
346#define CONFIG_SYS_PROMPT "=> "
347
348#if defined(CONFIG_CMD_KGDB)
349 #define CONFIG_SYS_CBSIZE 1024
350#else
351 #define CONFIG_SYS_CBSIZE 256
352#endif
353
354#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
355#define CONFIG_SYS_MAXARGS 16
356#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
357#define CONFIG_SYS_HZ 1000
358#define CONFIG_LOOPW
359
360
361
362
363
364
365#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
366
367
368
369
370
371
372#define BOOTFLAG_COLD 0x01
373#define BOOTFLAG_WARM 0x02
374
375#if defined(CONFIG_CMD_KGDB)
376#define CONFIG_KGDB_BAUDRATE 230400
377#define CONFIG_KGDB_SER_INDEX 2
378#endif
379
380
381
382
383
384
385
386#if defined(CONFIG_TSEC_ENET)
387#define CONFIG_ETHADDR 00:40:42:01:00:00
388#define CONFIG_ETH1ADDR 00:40:42:01:00:01
389#define CONFIG_ETH2ADDR 00:40:42:01:00:02
390#endif
391
392
393#define CONFIG_ROOTPATH /opt/eldk/ppc_85xx
394#define CONFIG_BOOTFILE pm854/uImage
395
396#define CONFIG_HOSTNAME pm854
397#define CONFIG_IPADDR 192.168.0.103
398#define CONFIG_SERVERIP 192.168.0.64
399#define CONFIG_GATEWAYIP 192.168.0.1
400#define CONFIG_NETMASK 255.255.255.0
401
402#define CONFIG_LOADADDR 200000
403
404#define CONFIG_BOOTDELAY 5
405#undef CONFIG_BOOTARGS
406
407#define CONFIG_BAUDRATE 9600
408
409#define CONFIG_EXTRA_ENV_SETTINGS \
410 "netdev=eth0\0" \
411 "consoledev=ttyS0\0" \
412 "ramdiskaddr=400000\0" \
413 "ramdiskfile=pm854/uRamdisk\0"
414
415#define CONFIG_NFSBOOTCOMMAND \
416 "setenv bootargs root=/dev/nfs rw " \
417 "nfsroot=$serverip:$rootpath " \
418 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
419 "console=$consoledev,$baudrate $othbootargs;" \
420 "tftp $loadaddr $bootfile;" \
421 "bootm $loadaddr"
422
423#define CONFIG_RAMBOOTCOMMAND \
424 "setenv bootargs root=/dev/ram rw " \
425 "console=$consoledev,$baudrate $othbootargs;" \
426 "tftp $ramdiskaddr $ramdiskfile;" \
427 "tftp $loadaddr $bootfile;" \
428 "bootm $loadaddr $ramdiskaddr"
429
430#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
431
432#endif
433