1/* 2 * (C) Copyright 2008 3 * Grazvydas Ignotas <notasas@gmail.com> 4 * 5 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by 6 * Richard Woodruff <r-woodruff2@ti.com> 7 * Syed Mohammed Khasim <khasim@ti.com> 8 * Sunil Kumar <sunilsaini05@gmail.com> 9 * Shashi Ranjan <shashiranjanmca05@gmail.com> 10 * 11 * (C) Copyright 2004-2008 12 * Texas Instruments, <www.ti.com> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 */ 32#include <common.h> 33#include <asm/io.h> 34#include <asm/arch/mux.h> 35#include <asm/arch/sys_proto.h> 36#include <asm/mach-types.h> 37#include "pandora.h" 38 39/****************************************************************************** 40 * Routine: board_init 41 * Description: Early hardware init. 42 *****************************************************************************/ 43int board_init(void) 44{ 45 DECLARE_GLOBAL_DATA_PTR; 46 47 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 48 /* board id for Linux */ 49 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA; 50 /* boot param addr */ 51 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 52 53 return 0; 54} 55 56/****************************************************************************** 57 * Routine: misc_init_r 58 * Description: Configure board specific parts 59 *****************************************************************************/ 60int misc_init_r(void) 61{ 62 gpio_t *gpio1_base = (gpio_t *)OMAP34XX_GPIO1_BASE; 63 gpio_t *gpio4_base = (gpio_t *)OMAP34XX_GPIO4_BASE; 64 gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE; 65 gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; 66 67 power_init_r(); 68 69 /* Configure GPIOs to output */ 70 writel(~(GPIO14 | GPIO15 | GPIO16 | GPIO23), &gpio1_base->oe); 71 writel(~GPIO22, &gpio4_base->oe); /* 118 */ 72 writel(~(GPIO0 | GPIO1 | GPIO28 | GPIO29 | GPIO30 | GPIO31), 73 &gpio5_base->oe); /* 128, 129, 156-159 */ 74 writel(~GPIO4, &gpio6_base->oe); /* 164 */ 75 76 /* Set GPIOs */ 77 writel(GPIO28, &gpio5_base->setdataout); 78 writel(GPIO4, &gpio6_base->setdataout); 79 80 dieid_num_r(); 81 82 return 0; 83} 84 85/****************************************************************************** 86 * Routine: set_muxconf_regs 87 * Description: Setting up the configuration Mux registers specific to the 88 * hardware. Many pins need to be moved from protect to primary 89 * mode. 90 *****************************************************************************/ 91void set_muxconf_regs(void) 92{ 93 MUX_PANDORA(); 94} 95