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31#include <common.h>
32#include <ACEX1K.h>
33#include <stratixII.h>
34
35
36
37
38#ifdef FPGA_DEBUG
39#define PRINTF(fmt,args...) printf (fmt ,##args)
40#else
41#define PRINTF(fmt,args...)
42#endif
43
44
45static int altera_validate (Altera_desc * desc, const char *fn);
46
47
48int altera_load( Altera_desc *desc, void *buf, size_t bsize )
49{
50 int ret_val = FPGA_FAIL;
51
52 if (!altera_validate (desc, (char *)__FUNCTION__)) {
53 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
54 } else {
55 switch (desc->family) {
56 case Altera_ACEX1K:
57 case Altera_CYC2:
58#if defined(CONFIG_FPGA_ACEX1K)
59 PRINTF ("%s: Launching the ACEX1K Loader...\n",
60 __FUNCTION__);
61 ret_val = ACEX1K_load (desc, buf, bsize);
62#elif defined(CONFIG_FPGA_CYCLON2)
63 PRINTF ("%s: Launching the CYCLON II Loader...\n",
64 __FUNCTION__);
65 ret_val = CYC2_load (desc, buf, bsize);
66#else
67 printf ("%s: No support for ACEX1K devices.\n",
68 __FUNCTION__);
69#endif
70 break;
71
72#if defined(CONFIG_FPGA_STRATIX_II)
73 case Altera_StratixII:
74 PRINTF ("%s: Launching the Stratix II Loader...\n",
75 __FUNCTION__);
76 ret_val = StratixII_load (desc, buf, bsize);
77 break;
78#endif
79 default:
80 printf ("%s: Unsupported family type, %d\n",
81 __FUNCTION__, desc->family);
82 }
83 }
84
85 return ret_val;
86}
87
88int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
89{
90 int ret_val = FPGA_FAIL;
91
92 if (!altera_validate (desc, (char *)__FUNCTION__)) {
93 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
94 } else {
95 switch (desc->family) {
96 case Altera_ACEX1K:
97#if defined(CONFIG_FPGA_ACEX)
98 PRINTF ("%s: Launching the ACEX1K Reader...\n",
99 __FUNCTION__);
100 ret_val = ACEX1K_dump (desc, buf, bsize);
101#else
102 printf ("%s: No support for ACEX1K devices.\n",
103 __FUNCTION__);
104#endif
105 break;
106
107#if defined(CONFIG_FPGA_STRATIX_II)
108 case Altera_StratixII:
109 PRINTF ("%s: Launching the Stratix II Reader...\n",
110 __FUNCTION__);
111 ret_val = StratixII_dump (desc, buf, bsize);
112 break;
113#endif
114 default:
115 printf ("%s: Unsupported family type, %d\n",
116 __FUNCTION__, desc->family);
117 }
118 }
119
120 return ret_val;
121}
122
123int altera_info( Altera_desc *desc )
124{
125 int ret_val = FPGA_FAIL;
126
127 if (altera_validate (desc, (char *)__FUNCTION__)) {
128 printf ("Family: \t");
129 switch (desc->family) {
130 case Altera_ACEX1K:
131 printf ("ACEX1K\n");
132 break;
133 case Altera_CYC2:
134 printf ("CYCLON II\n");
135 break;
136 case Altera_StratixII:
137 printf ("Stratix II\n");
138 break;
139
140 default:
141 printf ("Unknown family type, %d\n", desc->family);
142 }
143
144 printf ("Interface type:\t");
145 switch (desc->iface) {
146 case passive_serial:
147 printf ("Passive Serial (PS)\n");
148 break;
149 case passive_parallel_synchronous:
150 printf ("Passive Parallel Synchronous (PPS)\n");
151 break;
152 case passive_parallel_asynchronous:
153 printf ("Passive Parallel Asynchronous (PPA)\n");
154 break;
155 case passive_serial_asynchronous:
156 printf ("Passive Serial Asynchronous (PSA)\n");
157 break;
158 case altera_jtag_mode:
159 printf ("JTAG Mode\n");
160 break;
161 case fast_passive_parallel:
162 printf ("Fast Passive Parallel (FPP)\n");
163 break;
164 case fast_passive_parallel_security:
165 printf
166 ("Fast Passive Parallel with Security (FPPS) \n");
167 break;
168
169 default:
170 printf ("Unsupported interface type, %d\n", desc->iface);
171 }
172
173 printf ("Device Size: \t%d bytes\n"
174 "Cookie: \t0x%x (%d)\n",
175 desc->size, desc->cookie, desc->cookie);
176
177 if (desc->iface_fns) {
178 printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
179 switch (desc->family) {
180 case Altera_ACEX1K:
181 case Altera_CYC2:
182#if defined(CONFIG_FPGA_ACEX1K)
183 ACEX1K_info (desc);
184#elif defined(CONFIG_FPGA_CYCLON2)
185 CYC2_info (desc);
186#else
187
188 printf ("%s: No support for ACEX1K devices.\n",
189 __FUNCTION__);
190#endif
191 break;
192#if defined(CONFIG_FPGA_STRATIX_II)
193 case Altera_StratixII:
194 StratixII_info (desc);
195 break;
196#endif
197
198 default:
199
200 break;
201 }
202 } else {
203 printf ("No Device Function Table.\n");
204 }
205
206 ret_val = FPGA_SUCCESS;
207 } else {
208 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
209 }
210
211 return ret_val;
212}
213
214int altera_reloc( Altera_desc *desc, ulong reloc_offset)
215{
216 int ret_val = FPGA_FAIL;
217
218 if (!altera_validate (desc, (char *)__FUNCTION__)) {
219 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
220 } else {
221 switch (desc->family) {
222 case Altera_ACEX1K:
223#if defined(CONFIG_FPGA_ACEX1K)
224 ret_val = ACEX1K_reloc (desc, reloc_offset);
225#else
226 printf ("%s: No support for ACEX devices.\n",
227 __FUNCTION__);
228#endif
229 break;
230#if defined(CONFIG_FPGA_STRATIX_II)
231 case Altera_StratixII:
232 ret_val = StratixII_reloc (desc, reloc_offset);
233 break;
234#endif
235 case Altera_CYC2:
236#if defined(CONFIG_FPGA_CYCLON2)
237 ret_val = CYC2_reloc (desc, reloc_offset);
238#else
239 printf ("%s: No support for CYCLON II devices.\n",
240 __FUNCTION__);
241#endif
242 break;
243
244 default:
245 printf ("%s: Unsupported family type, %d\n",
246 __FUNCTION__, desc->family);
247 }
248 }
249
250 return ret_val;
251}
252
253
254
255static int altera_validate (Altera_desc * desc, const char *fn)
256{
257 int ret_val = FALSE;
258
259 if (desc) {
260 if ((desc->family > min_altera_type) &&
261 (desc->family < max_altera_type)) {
262 if ((desc->iface > min_altera_iface_type) &&
263 (desc->iface < max_altera_iface_type)) {
264 if (desc->size) {
265 ret_val = TRUE;
266 } else {
267 printf ("%s: NULL part size\n", fn);
268 }
269 } else {
270 printf ("%s: Invalid Interface type, %d\n",
271 fn, desc->iface);
272 }
273 } else {
274 printf ("%s: Invalid family type, %d\n", fn, desc->family);
275 }
276 } else {
277 printf ("%s: NULL descriptor!\n", fn);
278 }
279
280 return ret_val;
281}
282
283
284
