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11#include <common.h>
12#include <malloc.h>
13#include <spi.h>
14
15#include <asm/blackfin.h>
16#include <asm/mach-common/bits/spi.h>
17
18struct bfin_spi_slave {
19 struct spi_slave slave;
20 void *mmr_base;
21 u16 ctl, baud, flg;
22};
23
24#define MAKE_SPI_FUNC(mmr, off) \
25static inline void write_##mmr(struct bfin_spi_slave *bss, u16 val) { bfin_write16(bss->mmr_base + off, val); } \
26static inline u16 read_##mmr(struct bfin_spi_slave *bss) { return bfin_read16(bss->mmr_base + off); }
27MAKE_SPI_FUNC(SPI_CTL, 0x00)
28MAKE_SPI_FUNC(SPI_FLG, 0x04)
29MAKE_SPI_FUNC(SPI_STAT, 0x08)
30MAKE_SPI_FUNC(SPI_TDBR, 0x0c)
31MAKE_SPI_FUNC(SPI_RDBR, 0x10)
32MAKE_SPI_FUNC(SPI_BAUD, 0x14)
33
34#define to_bfin_spi_slave(s) container_of(s, struct bfin_spi_slave, slave)
35
36__attribute__((weak))
37int spi_cs_is_valid(unsigned int bus, unsigned int cs)
38{
39 return (cs >= 1 && cs <= 7);
40}
41
42__attribute__((weak))
43void spi_cs_activate(struct spi_slave *slave)
44{
45 struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
46 write_SPI_FLG(bss,
47 (read_SPI_FLG(bss) &
48 ~((!bss->flg << 8) << slave->cs)) |
49 (1 << slave->cs));
50 debug("%s: SPI_FLG:%x\n", __func__, read_SPI_FLG(bss));
51}
52
53__attribute__((weak))
54void spi_cs_deactivate(struct spi_slave *slave)
55{
56 struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
57 write_SPI_FLG(bss, read_SPI_FLG(bss) & ~(1 << slave->cs));
58 debug("%s: SPI_FLG:%x\n", __func__, read_SPI_FLG(bss));
59}
60
61void spi_init()
62{
63}
64
65struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
66 unsigned int max_hz, unsigned int mode)
67{
68 struct bfin_spi_slave *bss;
69 u32 mmr_base;
70 u32 baud;
71
72 if (!spi_cs_is_valid(bus, cs))
73 return NULL;
74
75 switch (bus) {
76#ifdef SPI_CTL
77# define SPI0_CTL SPI_CTL
78#endif
79 case 0: mmr_base = SPI0_CTL; break;
80#ifdef SPI1_CTL
81 case 1: mmr_base = SPI1_CTL; break;
82#endif
83#ifdef SPI2_CTL
84 case 2: mmr_base = SPI2_CTL; break;
85#endif
86 default: return NULL;
87 }
88
89 baud = get_sclk() / (2 * max_hz);
90 if (baud < 2)
91 baud = 2;
92 else if (baud > (u16)-1)
93 baud = -1;
94
95 bss = malloc(sizeof(*bss));
96 if (!bss)
97 return NULL;
98
99 bss->slave.bus = bus;
100 bss->slave.cs = cs;
101 bss->mmr_base = (void *)mmr_base;
102 bss->ctl = SPE | MSTR | TDBR_CORE;
103 if (mode & SPI_CPHA) bss->ctl |= CPHA;
104 if (mode & SPI_CPOL) bss->ctl |= CPOL;
105 if (mode & SPI_LSB_FIRST) bss->ctl |= LSBF;
106 bss->baud = baud;
107 bss->flg = mode & SPI_CS_HIGH ? 1 : 0;
108
109 debug("%s: bus:%i cs:%i mmr:%x ctl:%x baud:%i flg:%i\n", __func__,
110 bus, cs, mmr_base, bss->ctl, baud, bss->flg);
111
112 return &bss->slave;
113}
114
115void spi_free_slave(struct spi_slave *slave)
116{
117 struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
118 free(bss);
119}
120
121static void spi_portmux(struct spi_slave *slave)
122{
123#if defined(__ADSPBF51x__)
124#define SET_MUX(port, mux, func) port##_mux = ((port##_mux & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_##func)
125 u16 f_mux = bfin_read_PORTF_MUX();
126 u16 f_fer = bfin_read_PORTF_FER();
127 u16 g_mux = bfin_read_PORTG_MUX();
128 u16 g_fer = bfin_read_PORTG_FER();
129 u16 h_mux = bfin_read_PORTH_MUX();
130 u16 h_fer = bfin_read_PORTH_FER();
131 switch (slave->bus) {
132 case 0:
133
134 SET_MUX(g, 7, 1);
135 g_fer |= PG12 | PG13 | PG14;
136 switch (slave->cs) {
137 case 1: SET_MUX(f, 2, 1); f_fer |= PF7; break;
138 case 2: g_fer |= PG15; break;
139 case 3: SET_MUX(h, 1, 3); f_fer |= PH4; break;
140 case 4: break;
141 case 5: SET_MUX(g, 1, 3); h_fer |= PG3; break;
142 case 6: break;
143 case 7: break;
144 }
145 case 1:
146
147 SET_MUX(h, 0, 2);
148 h_fer |= PH1 | PH2 | PH3;
149 switch (slave->cs) {
150 case 1: SET_MUX(h, 2, 3); h_fer |= PH6; break;
151 case 2: SET_MUX(f, 0, 3); f_fer |= PF0; break;
152 case 3: SET_MUX(g, 0, 3); g_fer |= PG0; break;
153 case 4: SET_MUX(f, 3, 3); f_fer |= PF8; break;
154 case 5: SET_MUX(g, 6, 3); h_fer |= PG11; break;
155 case 6: break;
156 case 7: break;
157 }
158 }
159 bfin_write_PORTF_MUX(f_mux);
160 bfin_write_PORTF_FER(f_fer);
161 bfin_write_PORTG_MUX(g_mux);
162 bfin_write_PORTG_FER(g_fer);
163 bfin_write_PORTH_MUX(h_mux);
164 bfin_write_PORTH_FER(h_fer);
165#elif defined(__ADSPBF52x__)
166#define SET_MUX(port, mux, func) port##_mux = ((port##_mux & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_##func)
167 u16 f_mux = bfin_read_PORTF_MUX();
168 u16 f_fer = bfin_read_PORTF_FER();
169 u16 g_mux = bfin_read_PORTG_MUX();
170 u16 g_fer = bfin_read_PORTG_FER();
171 u16 h_mux = bfin_read_PORTH_MUX();
172 u16 h_fer = bfin_read_PORTH_FER();
173
174 SET_MUX(g, 0, 3);
175 g_fer |= PG2 | PG3 | PG4;
176 switch (slave->cs) {
177 case 1: g_fer |= PG1; break;
178 case 2: SET_MUX(f, 4, 3); f_fer |= PF12; break;
179 case 3: SET_MUX(f, 4, 3); f_fer |= PF13; break;
180 case 4: SET_MUX(h, 1, 1); h_fer |= PH8; break;
181 case 5: SET_MUX(h, 2, 1); h_fer |= PH9; break;
182 case 6: SET_MUX(f, 1, 3); f_fer |= PF9; break;
183 case 7: SET_MUX(f, 2, 3); f_fer |= PF10; break;
184 }
185 bfin_write_PORTF_MUX(f_mux);
186 bfin_write_PORTF_FER(f_fer);
187 bfin_write_PORTG_MUX(g_mux);
188 bfin_write_PORTG_FER(g_fer);
189 bfin_write_PORTH_MUX(h_mux);
190 bfin_write_PORTH_FER(h_fer);
191#elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
192 u16 mux = bfin_read_PORT_MUX();
193 u16 f_fer = bfin_read_PORTF_FER();
194 u16 j_fer = bfin_read_PORTJ_FER();
195
196 f_fer |= PF11 | PF12 | PF13;
197 switch (slave->cs) {
198 case 1: f_fer |= PF10; break;
199 case 2: mux |= PJSE; j_fer |= PJ11; break;
200 case 3: mux |= PJSE; j_fer |= PJ10; break;
201 case 4: mux |= PFS4E; f_fer |= PF6; break;
202 case 5: mux |= PFS5E; f_fer |= PF5; break;
203 case 6: mux |= PFS6E; f_fer |= PF4; break;
204 case 7: mux |= PJCE_SPI; j_fer |= PJ5; break;
205 }
206 bfin_write_PORT_MUX(mux);
207 bfin_write_PORTF_FER(f_fer);
208 bfin_write_PORTJ_FER(j_fer);
209#elif defined(__ADSPBF54x__)
210#define DO_MUX(port, pin) \
211 mux = ((mux & ~PORT_x_MUX_##pin##_MASK) | PORT_x_MUX_##pin##_FUNC_1); \
212 fer |= P##port##pin;
213 u32 mux;
214 u16 fer;
215 switch (slave->bus) {
216 case 0:
217 mux = bfin_read_PORTE_MUX();
218 fer = bfin_read_PORTE_FER();
219
220 DO_MUX(E, 0);
221 DO_MUX(E, 1);
222 DO_MUX(E, 2);
223 switch (slave->cs) {
224 case 1: DO_MUX(E, 4); break;
225 case 2: DO_MUX(E, 5); break;
226 case 3: DO_MUX(E, 6); break;
227 }
228 bfin_write_PORTE_MUX(mux);
229 bfin_write_PORTE_FER(fer);
230 break;
231 case 1:
232 mux = bfin_read_PORTG_MUX();
233 fer = bfin_read_PORTG_FER();
234
235 DO_MUX(G, 8);
236 DO_MUX(G, 9);
237 DO_MUX(G, 10);
238 switch (slave->cs) {
239 case 1: DO_MUX(G, 5); break;
240 case 2: DO_MUX(G, 6); break;
241 case 3: DO_MUX(G, 7); break;
242 }
243 bfin_write_PORTG_MUX(mux);
244 bfin_write_PORTG_FER(fer);
245 break;
246 case 2:
247 mux = bfin_read_PORTB_MUX();
248 fer = bfin_read_PORTB_FER();
249
250 DO_MUX(B, 12);
251 DO_MUX(B, 13);
252 DO_MUX(B, 14);
253 switch (slave->cs) {
254 case 1: DO_MUX(B, 9); break;
255 case 2: DO_MUX(B, 10); break;
256 case 3: DO_MUX(B, 11); break;
257 }
258 bfin_write_PORTB_MUX(mux);
259 bfin_write_PORTB_FER(fer);
260 break;
261 }
262#endif
263}
264
265int spi_claim_bus(struct spi_slave *slave)
266{
267 struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
268
269 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
270
271 spi_portmux(slave);
272 write_SPI_CTL(bss, bss->ctl);
273 write_SPI_BAUD(bss, bss->baud);
274 SSYNC();
275
276 return 0;
277}
278
279void spi_release_bus(struct spi_slave *slave)
280{
281 struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
282 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
283 write_SPI_CTL(bss, 0);
284 SSYNC();
285}
286
287int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
288 void *din, unsigned long flags)
289{
290 struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
291 const u8 *tx = dout;
292 u8 *rx = din;
293 uint bytes = bitlen / 8;
294 int ret = 0;
295
296 debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
297 slave->bus, slave->cs, bitlen, bytes, flags);
298
299 if (bitlen == 0)
300 goto done;
301
302
303 if (bitlen % 8) {
304 flags |= SPI_XFER_END;
305 goto done;
306 }
307
308 if (flags & SPI_XFER_BEGIN)
309 spi_cs_activate(slave);
310
311
312 while (bytes--) {
313 u8 value = (tx ? *tx++ : 0);
314 debug("%s: tx:%x ", __func__, value);
315 write_SPI_TDBR(bss, value);
316 SSYNC();
317 while ((read_SPI_STAT(bss) & TXS))
318 if (ctrlc()) {
319 ret = -1;
320 goto done;
321 }
322 while (!(read_SPI_STAT(bss) & SPIF))
323 if (ctrlc()) {
324 ret = -1;
325 goto done;
326 }
327 while (!(read_SPI_STAT(bss) & RXS))
328 if (ctrlc()) {
329 ret = -1;
330 goto done;
331 }
332 value = read_SPI_RDBR(bss);
333 if (rx)
334 *rx++ = value;
335 debug("rx:%x\n", value);
336 }
337
338 done:
339 if (flags & SPI_XFER_END)
340 spi_cs_deactivate(slave);
341
342 return ret;
343}
344
