1/* 2 * (C) Copyright 2001 3 * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/* 25 * board/config.h - configuration options, board specific 26 */ 27 28#ifndef __CONFIG_H 29#define __CONFIG_H 30 31#define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */ 32#define CONFIG_ETHER_PORT_MII /* use two MII ports */ 33#define CONFIG_INTEL_LXT97X /* Intel LXT97X phy */ 34 35#ifndef __ASSEMBLY__ 36#include <galileo/core.h> 37#endif 38 39#include "../board/evb64260/local.h" 40 41#define CONFIG_EVB64260 1 /* this is an EVB64260 board */ 42#define CONFIG_ZUMA_V2 1 /* always define this for ZUMA v2 */ 43 44/* #define CONFIG_ZUMA_V2_OLD 1 */ /* backwards compat for old V2 board */ 45 46#define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */ 47 48#define CONFIG_ECC /* enable ECC support */ 49 50#define CONFIG_750CX /* we have a 750CX/CXe (override local.h) */ 51 52/* which initialization functions to call for this board */ 53#define CONFIG_MISC_INIT_R 54#define CONFIG_BOARD_EARLY_INIT_F 55#define CONFIG_SYS_BOARD_ASM_INIT 56 57#define CONFIG_SYS_BOARD_NAME "Zuma APv2" 58 59#define CONFIG_SYS_HUSH_PARSER 60#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 61 62/* 63 * The following defines let you select what serial you want to use 64 * for your console driver. 65 * 66 * what to do: 67 * to use the DUART, undef CONFIG_MPSC. If you have hacked a serial 68 * cable onto the second DUART channel, change the CONFIG_SYS_DUART port from 1 69 * to 0 below. 70 * 71 * to use the MPSC, #define CONFIG_MPSC. If you have wired up another 72 * mpsc channel, change CONFIG_MPSC_PORT to the desired value. 73 */ 74#define CONFIG_MPSC 75 76#define CONFIG_MPSC_PORT 0 77 78#define CONFIG_NET_MULTI /* attempt all available adapters */ 79 80/* define this if you want to enable GT MAC filtering */ 81#define CONFIG_GT_USE_MAC_HASH_TABLE 82 83#if 1 84#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ 85#else 86#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ 87#endif 88#define CONFIG_ZERO_BOOTDELAY_CHECK 89 90#undef CONFIG_BOOTARGS 91 92#define CONFIG_BOOTCOMMAND \ 93 "tftpboot && " \ 94 "setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath " \ 95 "ip=$ipaddr:$serverip:$gatewayip:" \ 96 "$netmask:$hostname:eth0:none panic=5 && bootm" 97 98#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ 99#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate changes */ 100 101#undef CONFIG_WATCHDOG /* watchdog disabled */ 102#undef CONFIG_ALTIVEC /* undef to disable */ 103 104/* 105 * BOOTP options 106 */ 107#define CONFIG_BOOTP_SUBNETMASK 108#define CONFIG_BOOTP_GATEWAY 109#define CONFIG_BOOTP_HOSTNAME 110#define CONFIG_BOOTP_BOOTPATH 111#define CONFIG_BOOTP_BOOTFILESIZE 112 113#define CONFIG_MII /* enable MII commands */ 114 115 116/* 117 * Command line configuration. 118 */ 119#include <config_cmd_default.h> 120 121#define CONFIG_CMD_ASKENV 122#define CONFIG_CMD_BSP 123#define CONFIG_CMD_JFFS2 124#define CONFIG_CMD_MII 125#define CONFIG_CMD_DATE 126 127 128/* 129 * JFFS2 partitions 130 * 131 */ 132/* No command line, one static partition, whole device */ 133#undef CONFIG_JFFS2_CMDLINE 134#define CONFIG_JFFS2_DEV "nor0" 135#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF 136#define CONFIG_JFFS2_PART_OFFSET 0x00000000 137 138/* mtdparts command line support */ 139/* Note: fake mtd_id used, no linux mtd map file */ 140/* 141#define CONFIG_JFFS2_CMDLINE 142#define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2" 143#define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)" 144*/ 145 146/* 147 * Miscellaneous configurable options 148 */ 149#define CONFIG_SYS_LONGHELP /* undef to save memory */ 150#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 151#if defined(CONFIG_CMD_KGDB) 152#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 153#else 154#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 155#endif 156#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 157#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 158#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 159 160#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ 161#define CONFIG_SYS_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ 162 163#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */ 164 165#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ 166 167#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */ 168 169#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ 170 171#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } 172 173/* 174 * Low Level Configuration Settings 175 * (address mappings, register initial values, etc.) 176 * You should know what you are doing if you make changes here. 177 */ 178 179/*----------------------------------------------------------------------- 180 * Definitions for initial stack pointer and data area 181 */ 182#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 183#define CONFIG_SYS_INIT_RAM_END 0x1000 184#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for init data */ 185#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 186#define CONFIG_SYS_INIT_RAM_LOCK 187 188 189/*----------------------------------------------------------------------- 190 * Start addresses for the final memory configuration 191 * (Set up by the startup code) 192 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 193 */ 194#define CONFIG_SYS_SDRAM_BASE 0x00000000 195#define CONFIG_SYS_FLASH_BASE 0xfff00000 196#define CONFIG_SYS_RESET_ADDRESS 0xfff00100 197#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 198#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 199#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ 200 201/* areas to map different things with the GT in physical space */ 202#define CONFIG_SYS_DRAM_BANKS 4 203#define CONFIG_SYS_DFL_GT_REGS 0x14000000 /* boot time GT_REGS */ 204 205/* What to put in the bats. */ 206#define CONFIG_SYS_MISC_REGION_BASE 0xf0000000 207 208/* Peripheral Device section */ 209#define CONFIG_SYS_GT_REGS 0xf8000000 /* later mapped GT_REGS */ 210#define CONFIG_SYS_DEV_BASE 0xf0000000 211#define CONFIG_SYS_DEV0_SIZE _64M /* zuma flash @ 0xf000.0000*/ 212#define CONFIG_SYS_DEV1_SIZE _8M /* zuma IDE @ 0xf400.0000 */ 213#define CONFIG_SYS_DEV2_SIZE _8M /* unused */ 214#define CONFIG_SYS_DEV3_SIZE _8M /* unused */ 215 216#define CONFIG_SYS_DEV0_PAR 0xc498243c 217 /* c 4 9 8 2 4 3 c */ 218 /* 33 22|2222|22 22|111 1|11 11|1 1 | | */ 219 /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */ 220 /* 11|00|0100|10 01|100|0 00|10 0|100 0|011 1|100 */ 221 /* 3| 0|.... ..| 1| 4 | 0 | 4 | 8 | 7 | 4 */ 222 223#define CONFIG_SYS_DEV1_PAR 0xc01b6ac5 224 /* c 0 1 b 6 a c 5 */ 225 /* 33 22|2222|22 22|111 1|11 11|1 1 | | */ 226 /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */ 227 /* 11|00|0000|00 01|101|1 01|10 1|010 1|100 0|101 */ 228 /* 3| 0|.... ..| 1| 5 | 5 | 5 | 5 | 8 | 5 */ 229 230 231#define CONFIG_SYS_8BIT_BOOT_PAR 0xc00b5e7c 232 233#define CONFIG_SYS_MPP_CONTROL_0 0x00007777 /* GPP[7:4] : REQ0[1:0] GNT0[1:0] */ 234#define CONFIG_SYS_MPP_CONTROL_1 0x00000000 /* GPP[15:12] : GPP[11:8] */ 235#define CONFIG_SYS_MPP_CONTROL_2 0x00008888 /* GPP[23:20] : REQ1[1:0] GNT1[1:0] */ 236#define CONFIG_SYS_MPP_CONTROL_3 0x00000000 /* GPP[31:28] (int[3:0]) */ 237 /* GPP[27:24] (27 is int4, rest are GPP) */ 238 239#define CONFIG_SYS_SERIAL_PORT_MUX 0x00001101 /* 11=MPSC1/MPSC0 01=ETH, 0=only MII */ 240#define CONFIG_SYS_GPP_LEVEL_CONTROL 0xf8000000 /* interrupt inputs: GPP[31:27] */ 241 242#define CONFIG_SYS_SDRAM_CONFIG 0xe4e18200 /* 0x448 */ 243 /* idmas use buffer 1,1 244 comm use buffer 1 245 pci use buffer 0,0 (pci1->0 pci0->0) 246 cpu use buffer 1 (R*18) 247 normal load (see also ifdef HVL) 248 standard SDRAM (see also ifdef REG) 249 non staggered refresh */ 250 /* 31:26 25 23 20 19 18 16 */ 251 /* 111001 00 111 0 0 00 1 */ 252 253 /* refresh count=0x200 254 phy interleave disable (by default, 255 set later by dram config..) 256 virt interleave enable */ 257 /* 15 14 13:0 */ 258 /* 1 0 0x200 */ 259 260#define CONFIG_SYS_DEV0_SPACE CONFIG_SYS_DEV_BASE 261#define CONFIG_SYS_DEV1_SPACE (CONFIG_SYS_DEV0_SPACE + CONFIG_SYS_DEV0_SIZE) 262#define CONFIG_SYS_DEV2_SPACE (CONFIG_SYS_DEV1_SPACE + CONFIG_SYS_DEV1_SIZE) 263#define CONFIG_SYS_DEV3_SPACE (CONFIG_SYS_DEV2_SPACE + CONFIG_SYS_DEV2_SIZE) 264 265/*----------------------------------------------------------------------- 266 * PCI stuff 267 */ 268 269#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ 270#define PCI_HOST_FORCE 1 /* configure as pci host */ 271#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ 272 273#define CONFIG_PCI /* include pci support */ 274#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ 275#define CONFIG_PCI_PNP /* do pci plug-and-play */ 276 277/* PCI MEMORY MAP section */ 278#define CONFIG_SYS_PCI0_MEM_BASE 0x80000000 279#define CONFIG_SYS_PCI0_MEM_SIZE _128M 280#define CONFIG_SYS_PCI1_MEM_BASE 0x88000000 281#define CONFIG_SYS_PCI1_MEM_SIZE _128M 282 283#define CONFIG_SYS_PCI0_0_MEM_SPACE (CONFIG_SYS_PCI0_MEM_BASE) 284#define CONFIG_SYS_PCI1_0_MEM_SPACE (CONFIG_SYS_PCI1_MEM_BASE) 285 286/* PCI I/O MAP section */ 287#define CONFIG_SYS_PCI0_IO_BASE 0xfa000000 288#define CONFIG_SYS_PCI0_IO_SIZE _16M 289#define CONFIG_SYS_PCI1_IO_BASE 0xfb000000 290#define CONFIG_SYS_PCI1_IO_SIZE _16M 291 292#define CONFIG_SYS_PCI0_IO_SPACE (CONFIG_SYS_PCI0_IO_BASE) 293#define CONFIG_SYS_PCI0_IO_SPACE_PCI 0x00000000 294#define CONFIG_SYS_PCI1_IO_SPACE (CONFIG_SYS_PCI1_IO_BASE) 295#define CONFIG_SYS_PCI1_IO_SPACE_PCI 0x00000000 296 297 298/*---------------------------------------------------------------------- 299 * Initial BAT mappings 300 */ 301 302/* NOTES: 303 * 1) GUARDED and WRITE_THRU not allowed in IBATS 304 * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT 305 */ 306 307/* SDRAM */ 308#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) 309#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) 310#define CONFIG_SYS_DBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 311#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U 312 313/* init ram */ 314#define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE) 315#define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) 316#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L 317#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U 318 319/* PCI0, PCI1 memory space (starting at PCI0 base, mapped in one BAT) */ 320#define CONFIG_SYS_IBAT2L BATL_NO_ACCESS 321#define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U 322#define CONFIG_SYS_DBAT2L (CONFIG_SYS_PCI0_MEM_BASE | BATL_CACHEINHIBIT | BATL_PP_RW | BATL_GUARDEDSTORAGE) 323#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCI0_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) 324 325/* GT regs, bootrom, all the devices, PCI I/O */ 326#define CONFIG_SYS_IBAT3L (CONFIG_SYS_MISC_REGION_BASE | BATL_CACHEINHIBIT | BATL_PP_RW) 327#define CONFIG_SYS_IBAT3U (CONFIG_SYS_MISC_REGION_BASE | BATU_VS | BATU_VP | BATU_BL_256M) 328#define CONFIG_SYS_DBAT3L (CONFIG_SYS_MISC_REGION_BASE | BATL_CACHEINHIBIT | BATL_PP_RW | BATL_GUARDEDSTORAGE) 329#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U 330 331/* 332 * For booting Linux, the board info and command line data 333 * have to be in the first 8 MB of memory, since this is 334 * the maximum mapped by the Linux kernel during initialization. 335 */ 336#define CONFIG_SYS_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */ 337 338 339/*----------------------------------------------------------------------- 340 * FLASH organization 341 */ 342#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */ 343#define CONFIG_SYS_MAX_FLASH_SECT 130 /* max number of sectors on one chip */ 344 345#define CONFIG_SYS_EXTRA_FLASH_DEVICE DEVICE0 /* extra flash at device 0 */ 346#define CONFIG_SYS_EXTRA_FLASH_WIDTH 2 /* 16 bit */ 347 348#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 349#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 350#define CONFIG_SYS_FLASH_CFI 1 351 352#define CONFIG_ENV_IS_IN_FLASH 1 353#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ 354#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sect real size */ 355#define CONFIG_ENV_ADDR (0xfff80000 - CONFIG_ENV_SECT_SIZE) 356 357/*----------------------------------------------------------------------- 358 * Cache Configuration 359 */ 360#define CONFIG_SYS_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */ 361#if defined(CONFIG_CMD_KGDB) 362#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ 363#endif 364 365/*----------------------------------------------------------------------- 366 * L2CR setup -- make sure this is right for your board! 367 * look in include/74xx_7xx.h for the defines used here 368 */ 369 370#define CONFIG_SYS_L2 371 372#ifdef CONFIG_750CX 373#define L2_INIT 0 374#else 375#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \ 376 L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) 377#endif 378 379#define L2_ENABLE (L2_INIT | L2CR_L2E) 380 381/*------------------------------------------------------------------------ 382 * Real time clock 383 */ 384#define CONFIG_RTC_DS1302 385 386 387/*------------------------------------------------------------------------ 388 * Galileo I2C driver 389 */ 390#define CONFIG_GT_I2C 391 392/* 393 * Internal Definitions 394 * 395 * Boot Flags 396 */ 397#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ 398#define BOOTFLAG_WARM 0x02 /* Software reboot */ 399 400#endif /* __CONFIG_H */ 401