1/* 2 * (C) Copyright 2002 3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/* 25 * board/config.h - configuration options, board specific 26 */ 27 28#ifndef __CONFIG_H 29#define __CONFIG_H 30 31/* 32 * High Level Configuration Options 33 * (easy to change) 34 */ 35 36#define CONFIG_X86 1 /* This is a X86 CPU */ 37#define CONFIG_SC520 1 /* Include support for AMD SC520 */ 38 39#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */ 40#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */ 41#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 /* 3T */ 42 43/* define at most one of these */ 44#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T 45#define CONFIG_SYS_SDRAM_CAS_LATENCY_3T 46 47#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ 48#undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ 49#undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ 50#define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */ 51#undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */ 52 53#define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */ 54 55#define CONFIG_SHOW_BOOT_PROGRESS 1 56#define CONFIG_LAST_STAGE_INIT 1 57 58/* 59 * Size of malloc() pool 60 */ 61#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024) 62 63 64#define CONFIG_BAUDRATE 9600 65 66 67/* 68 * BOOTP options 69 */ 70#define CONFIG_BOOTP_BOOTFILESIZE 71#define CONFIG_BOOTP_BOOTPATH 72#define CONFIG_BOOTP_GATEWAY 73#define CONFIG_BOOTP_HOSTNAME 74 75 76/* 77 * Command line configuration. 78 */ 79#include <config_cmd_default.h> 80 81#define CONFIG_CMD_PCI 82#define CONFIG_CMD_JFFS2 83#define CONFIG_CMD_IDE 84#define CONFIG_CMD_NET 85#define CONFIG_CMD_PCMCIA 86#define CONFIG_CMD_EEPROM 87 88 89#define CONFIG_BOOTDELAY 15 90#define CONFIG_BOOTARGS "root=/dev/mtdblock1 console=ttyS0,9600 " \ 91 "mtdparts=phys:7936k(root),256k(uboot) " 92#define CONFIG_BOOTCOMMAND "setenv bootargs root=/dev/nfs ip=autoconf " \ 93 "console=ttyS0,9600 " \ 94 "mtdparts=phys:7808k(root),128k(env),256k(uboot);" \ 95 "bootp;bootm" 96 97#if defined(CONFIG_CMD_KGDB) 98#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ 99#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 100#endif 101 102 103/* 104 * Miscellaneous configurable options 105 */ 106#define CONFIG_SYS_LONGHELP /* undef to save memory */ 107#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */ 108#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 109#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 110#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 111#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 112 113#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ 114#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ 115 116#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ 117 118#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ 119 120#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ 121 122 /* valid baudrates */ 123#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 124 125 126/*----------------------------------------------------------------------- 127 * Physical Memory Map 128 */ 129#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */ 130 131/*----------------------------------------------------------------------- 132 * FLASH and environment organization 133 */ 134 135 136#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 137#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 138 139/* timeout values are in ticks */ 140#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 141#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ 142 143 144#define CONFIG_SPI_EEPROM /* SPI EEPROMs such as AT25010 or AT25640 */ 145#define CONFIG_MW_EEPROM /* MicroWire EEPROMS such as AT93LC46 */ 146#define CONFIG_DTT_DS1722 /* Dallas DS1722 SPI Temperature probe */ 147 148 149/* allow to overwrite serial and ethaddr */ 150#define CONFIG_ENV_OVERWRITE 151 152 153#if 0 154/* Environment in flash */ 155#define CONFIG_ENV_IS_IN_FLASH 1 156# define CONFIG_ENV_ADDR (0x387a0000) /* Addr of Environment Sector */ 157# define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector (or 0x10000) */ 158# define CONFIG_ENV_OFFSET 0 159 160#else 161/* Environment in EEPROM */ 162 163# define CONFIG_ENV_IS_IN_EEPROM 1 164# define CONFIG_SPI 165# define CONFIG_SPI_X 1 166# define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment EEPROM */ 167# define CONFIG_ENV_OFFSET 0x1c00 168 169#endif 170 171/* 172 * JFFS2 partitions 173 * 174 */ 175/* No command line, one static partition, whole device */ 176#undef CONFIG_JFFS2_CMDLINE 177#define CONFIG_JFFS2_DEV "nor0" 178#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF 179#define CONFIG_JFFS2_PART_OFFSET 0x00000000 180 181/* mtdparts command line support */ 182/* Note: fake mtd_id used, no linux mtd map file */ 183/* 184#define CONFIG_JFFS2_CMDLINE 185#define MTDIDS_DEFAULT "nor0=sc520_spunk-0" 186#define MTDPARTS_DEFAULT "mtdparts=sc520_spunk-0:-(jffs2)" 187*/ 188 189/*----------------------------------------------------------------------- 190 * Device drivers 191 */ 192#define CONFIG_NET_MULTI /* Multi ethernet cards support */ 193#define CONFIG_EEPRO100 194#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ 195 196/************************************************************ 197 * IDE/ATA stuff 198 ************************************************************/ 199#define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ 200#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ 201#define CONFIG_SYS_ATA_BASE_ADDR 0 202#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 /* ide0 offset */ 203#define CONFIG_SYS_ATA_IDE1_OFFSET 0xe000 /* ide1 offset */ 204#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ 205#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ 206#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ 207 208#define CONFIG_SYS_FIRST_PCMCIA_BUS 1 209 210#undef CONFIG_IDE_LED /* no led for ide supported */ 211#undef CONFIG_IDE_RESET /* reset for ide unsupported... */ 212#undef CONFIG_IDE_RESET_ROUTINE /* no special reset function */ 213 214#define CONFIG_IDE_TI_CARDBUS 215#define CONFIG_SYS_PCMCIA_CIS_WIN 0x27f00000 216#define CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 0x00100000 217#define CONFIG_SYS_PCMCIA_IO_WIN 0xe000 218#define CONFIG_SYS_PCMCIA_IO_WIN_SIZE 16 219 220/************************************************************ 221 * DISK Partition support 222 ************************************************************/ 223#define CONFIG_DOS_PARTITION 224#define CONFIG_MAC_PARTITION 225#define CONFIG_ISO_PARTITION /* Experimental */ 226 227 228/************************************************************ 229 * RTC 230 ***********************************************************/ 231#define CONFIG_RTC_MC146818 232#undef CONFIG_WATCHDOG /* watchdog disabled */ 233 234/* 235 * PCI stuff 236 */ 237#define CONFIG_PCI /* include pci support */ 238#define CONFIG_PCI_PNP /* pci plug-and-play */ 239#define CONFIG_PCI_SCAN_SHOW 240 241#define CONFIG_SYS_FIRST_PCI_IRQ 9 242#define CONFIG_SYS_SECOND_PCI_IRQ 10 243#define CONFIG_SYS_THIRD_PCI_IRQ 11 244#define CONFIG_SYS_FORTH_PCI_IRQ 12 245 246#endif /* __CONFIG_H */ 247