LXR uboot/post/board/lwmon5/gdc.c

   1/*
   2 * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
   3 *
   4 * Developed for DENX Software Engineering GmbH
   5 *
   6 * See file CREDITS for list of people who contributed to this
   7 * project.
   8 *
   9 * This program is free software; you can redistribute it and/or
  10 * modify it under the terms of the GNU General Public License as
  11 * published by the Free Software Foundation; either version 2 of
  12 * the License, or (at your option) any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 * MA 02111-1307 USA
  23 */
  24#include <common.h>
  25
  26/* This test attempts to verify board GDC. A scratch register tested, then
  27 * simple memory test (get_ram_size()) run over GDC memory.
  28 */
  29
  30#include <post.h>
  31
  32#include <asm/io.h>
  33
  34DECLARE_GLOBAL_DATA_PTR;
  35
  36#define GDC_SCRATCH_REG 0xC1FF8044
  37#define GDC_VERSION_REG 0xC1FF8084
  38#define GDC_RAM_START   0xC0000000
  39#define GDC_RAM_END     0xC2000000
  40
  41#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
  42
  43static int gdc_test_reg_one(uint value)
  44{
  45        int ret;
  46        uint read_value;
  47
  48        /* write test pattern */
  49        out_be32((void *)GDC_SCRATCH_REG, value);
  50        /* read other location (protect against data lines capacity) */
  51        ret = in_be32((void *)GDC_RAM_START);
  52        /* verify test pattern */
  53        read_value = in_be32((void *)GDC_SCRATCH_REG);
  54        if (read_value != value) {
  55                post_log("GDC SCRATCH test failed write %08X, read %08X\n",
  56                        value, read_value);
  57        }
  58
  59        return (read_value != value);
  60}
  61
  62/* Verify GDC, get memory size */
  63int gdc_post_test(int flags)
  64{
  65        uint   old_value;
  66        int    ret = 0;
  67
  68        post_log("\n");
  69        old_value = in_be32((void *)GDC_SCRATCH_REG);
  70
  71        /*
  72         * GPIOC2 register behaviour: the LIME graphics processor has a
  73         * maximum of 5 GPIO ports that can be used in this hardware
  74         * configuration. Thus only the  bits  for these 5 GPIOs can be
  75         * activated in the GPIOC2 register. All other bits will always be
  76         * read as zero.
  77         */
  78        if (gdc_test_reg_one(0x00150015))
  79                ret = 1;
  80        if (gdc_test_reg_one(0x000A000A))
  81                ret = 1;
  82
  83        out_be32((void *)GDC_SCRATCH_REG, old_value);
  84
  85        old_value = in_be32((void *)GDC_VERSION_REG);
  86        post_log("GDC chip version %u.%u, year %04X\n",
  87                (old_value >> 8) & 0xFF, old_value & 0xFF,
  88                (old_value >> 16) & 0xFFFF);
  89
  90        old_value = get_ram_size((void *)GDC_RAM_START,
  91                                 GDC_RAM_END - GDC_RAM_START);
  92        post_log("GDC RAM size: %d bytes\n", old_value);
  93
  94        return ret;
  95}
  96#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC4 */
  97