LXR uboot/board/cogent/serial.c

   1/*
   2 * Simple serial driver for Cogent motherboard serial ports
   3 * for use during boot
   4 */
   5
   6#include <common.h>
   7#include <board/cogent/serial.h>
   8
   9DECLARE_GLOBAL_DATA_PTR;
  10
  11#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
  12
  13#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
  14     (defined(CONFIG_8260) && defined(CONFIG_CONS_NONE))
  15
  16#if CONFIG_CONS_INDEX == 1
  17#define CMA_MB_SERIAL_BASE      CMA_MB_SERIALA_BASE
  18#elif CONFIG_CONS_INDEX == 2
  19#define CMA_MB_SERIAL_BASE      CMA_MB_SERIALB_BASE
  20#elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
  21#define CMA_MB_SERIAL_BASE      CMA_MB_SER2A_BASE
  22#elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
  23#define CMA_MB_SERIAL_BASE      CMA_MB_SER2B_BASE
  24#else
  25#error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
  26#endif
  27
  28int serial_init (void)
  29{
  30        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
  31
  32        cma_mb_reg_write (&mbsp->ser_ier, 0x00);        /* turn off interrupts */
  33        serial_setbrg ();
  34        cma_mb_reg_write (&mbsp->ser_lcr, 0x03);        /* 8 data, 1 stop, no parity */
  35        cma_mb_reg_write (&mbsp->ser_mcr, 0x03);        /* RTS/DTR */
  36        cma_mb_reg_write (&mbsp->ser_fcr, 0x07);        /* Clear & enable FIFOs */
  37
  38        return (0);
  39}
  40
  41void serial_setbrg (void)
  42{
  43        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
  44        unsigned int divisor;
  45        unsigned char lcr;
  46
  47        if ((divisor = br_to_div (gd->baudrate)) == 0)
  48                divisor = DEFDIV;
  49
  50        lcr = cma_mb_reg_read (&mbsp->ser_lcr);
  51        cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80);  /* Access baud rate(set DLAB) */
  52        cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
  53        cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
  54        cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */
  55}
  56
  57void serial_putc (const char c)
  58{
  59        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
  60
  61        if (c == '\n')
  62                serial_putc ('\r');
  63
  64        while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
  65
  66        cma_mb_reg_write (&mbsp->ser_thr, c);
  67}
  68
  69void serial_puts (const char *s)
  70{
  71        while (*s != '\0')
  72                serial_putc (*s++);
  73}
  74
  75int serial_getc (void)
  76{
  77        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
  78
  79        while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
  80
  81        return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
  82}
  83
  84int serial_tstc (void)
  85{
  86        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
  87
  88        return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
  89}
  90
  91#endif /* CONS_NONE */
  92
  93#if defined(CONFIG_CMD_KGDB) && \
  94    defined(CONFIG_KGDB_NONE)
  95
  96#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
  97#error Console and kgdb are on the same serial port - this is not supported
  98#endif
  99
 100#if CONFIG_KGDB_INDEX == 1
 101#define CMA_MB_KGDB_SER_BASE    CMA_MB_SERIALA_BASE
 102#elif CONFIG_KGDB_INDEX == 2
 103#define CMA_MB_KGDB_SER_BASE    CMA_MB_SERIALB_BASE
 104#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
 105#define CMA_MB_KGDB_SER_BASE    CMA_MB_SER2A_BASE
 106#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
 107#define CMA_MB_KGDB_SER_BASE    CMA_MB_SER2B_BASE
 108#else
 109#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
 110#endif
 111
 112void kgdb_serial_init (void)
 113{
 114        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
 115        unsigned int divisor;
 116
 117        if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
 118                divisor = DEFDIV;
 119
 120        cma_mb_reg_write (&mbsp->ser_ier, 0x00);        /* turn off interrupts */
 121        cma_mb_reg_write (&mbsp->ser_lcr, 0x80);        /* Access baud rate(set DLAB) */
 122        cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
 123        cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
 124        cma_mb_reg_write (&mbsp->ser_lcr, 0x03);        /* 8 data, 1 stop, no parity */
 125        cma_mb_reg_write (&mbsp->ser_mcr, 0x03);        /* RTS/DTR */
 126        cma_mb_reg_write (&mbsp->ser_fcr, 0x07);        /* Clear & enable FIFOs */
 127
 128        printf ("[on cma10x serial port B] ");
 129}
 130
 131void putDebugChar (int c)
 132{
 133        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
 134
 135        while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
 136
 137        cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
 138}
 139
 140void putDebugStr (const char *str)
 141{
 142        while (*str != '\0') {
 143                if (*str == '\n')
 144                        putDebugChar ('\r');
 145                putDebugChar (*str++);
 146        }
 147}
 148
 149int getDebugChar (void)
 150{
 151        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
 152
 153        while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
 154
 155        return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
 156}
 157
 158void kgdb_interruptible (int yes)
 159{
 160        cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
 161
 162        if (yes == 1) {
 163                printf ("kgdb: turning serial ints on\n");
 164                cma_mb_reg_write (&mbsp->ser_ier, 0xf);
 165        } else {
 166                printf ("kgdb: turning serial ints off\n");
 167                cma_mb_reg_write (&mbsp->ser_ier, 0x0);
 168        }
 169}
 170
 171#endif /* KGDB && KGDB_NONE */
 172
 173#endif /* CAPS & SERPAR */
 174