1/* 2 * (C) Copyright 2006 3 * Stefan Roese, DENX Software Engineering, sr@denx.de. 4 * 5 * (C) Copyright 2002 6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net 7 * 8 * (C) Copyright 2002 9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 10 * Marius Groeger <mgroeger@sysgo.de> 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31#include <common.h> 32#include <command.h> 33#include <malloc.h> 34#include <netdev.h> 35#include <asm/arch/ixp425.h> 36 37DECLARE_GLOBAL_DATA_PTR; 38 39/* 40 * Miscelaneous platform dependent initialisations 41 */ 42int board_init (void) 43{ 44 /* arch number of IXDP */ 45 gd->bd->bi_arch_number = MACH_TYPE_IXDP425; 46 47 /* adress of boot parameters */ 48 gd->bd->bi_boot_params = 0x00000100; 49 50#ifdef CONFIG_IXDPG425 51 /* arch number of IXDP */ 52 gd->bd->bi_arch_number = MACH_TYPE_IXDPG425; 53 54 /* 55 * Get realtek RTL8305 switch and SLIC out of reset 56 */ 57 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N); 58 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N); 59 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N); 60 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N); 61 62 /* 63 * Setup GPIO's for PCI INTA & INTB 64 */ 65 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N); 66 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N); 67 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N); 68 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N); 69 70 /* 71 * Setup GPIO's for 33MHz clock output 72 */ 73 *IXP425_GPIO_GPCLKR = 0x01FF01FF; 74 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); 75 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); 76#endif 77 78 return 0; 79} 80 81/* 82 * Check Board Identity 83 */ 84int checkboard(void) 85{ 86 char *s = getenv("serial#"); 87 88#ifdef CONFIG_IXDPG425 89 puts("Board: IXDPG425 - Intel Network Gateway Reference Platform"); 90#else 91 puts("Board: IXDP425 - Intel Development Platform"); 92#endif 93 94 if (s != NULL) { 95 puts(", serial# "); 96 puts(s); 97 } 98 putc('\n'); 99 100 return (0); 101} 102 103int dram_init (void) 104{ 105 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 106 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 107 108 return (0); 109} 110 111#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) 112extern struct pci_controller hose; 113extern void pci_ixp_init(struct pci_controller * hose); 114 115void pci_init_board(void) 116{ 117 extern void pci_ixp_init (struct pci_controller *hose); 118 119 pci_ixp_init(&hose); 120} 121#endif 122 123int board_eth_init(bd_t *bis) 124{ 125 return pci_eth_init(bis); 126} 127