1/* 2 * (C) Copyright 2003 3 * Texas Instruments <www.ti.com> 4 * 5 * (C) Copyright 2002 6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 7 * Marius Groeger <mgroeger@sysgo.de> 8 * 9 * (C) Copyright 2002 10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 11 * Alex Zuepke <azu@sysgo.de> 12 * 13 * (C) Copyright 2002-2004 14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 15 * 16 * (C) Copyright 2004 17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> 18 * 19 * See file CREDITS for list of people who contributed to this 20 * project. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License as 24 * published by the Free Software Foundation; either version 2 of 25 * the License, or (at your option) any later version. 26 * 27 * This program is distributed in the hope that it will be useful, 28 * but WITHOUT ANY WARRANTY; without even the implied warranty of 29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 30 * GNU General Public License for more details. 31 * 32 * You should have received a copy of the GNU General Public License 33 * along with this program; if not, write to the Free Software 34 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 35 * MA 02111-1307 USA 36 */ 37 38#include <common.h> 39#include <arm926ejs.h> 40 41#define TIMER_LOAD_VAL 0xffffffff 42 43/* macro to read the 32 bit timer */ 44#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) 45 46static ulong timestamp; 47static ulong lastdec; 48 49#define TIMER_ENABLE (1 << 7) 50#define TIMER_MODE_MSK (1 << 6) 51#define TIMER_MODE_FR (0 << 6) 52#define TIMER_MODE_PD (1 << 6) 53 54#define TIMER_INT_EN (1 << 5) 55#define TIMER_PRS_MSK (3 << 2) 56#define TIMER_PRS_8S (1 << 3) 57#define TIMER_SIZE_MSK (1 << 2) 58#define TIMER_ONE_SHT (1 << 0) 59 60int timer_init (void) 61{ 62 ulong tmr_ctrl_val; 63 64 /* 1st disable the Timer */ 65 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); 66 tmr_ctrl_val &= ~TIMER_ENABLE; 67 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; 68 69 /* 70 * The Timer Control Register has one Undefined/Shouldn't Use Bit 71 * So we should do read/modify/write Operation 72 */ 73 74 /* 75 * Timer Mode : Free Running 76 * Interrupt : Disabled 77 * Prescale : 8 Stage, Clk/256 78 * Tmr Siz : 16 Bit Counter 79 * Tmr in Wrapping Mode 80 */ 81 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); 82 tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT ); 83 tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); 84 85 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; 86 87 /* init the timestamp and lastdec value */ 88 reset_timer_masked(); 89 90 return 0; 91} 92 93/* 94 * timer without interrupts 95 */ 96 97void reset_timer (void) 98{ 99 reset_timer_masked (); 100} 101 102ulong get_timer (ulong base) 103{ 104 return get_timer_masked () - base; 105} 106 107void set_timer (ulong t) 108{ 109 timestamp = t; 110} 111 112/* delay x useconds AND perserve advance timstamp value */ 113void udelay (unsigned long usec) 114{ 115 ulong tmo, tmp; 116 117 if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ 118 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ 119 tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ 120 tmo /= 1000; /* finish normalize. */ 121 }else{ /* else small number, don't kill it prior to HZ multiply */ 122 tmo = usec * CONFIG_SYS_HZ; 123 tmo /= (1000*1000); 124 } 125 126 tmp = get_timer (0); /* get current timestamp */ 127 if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */ 128 reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */ 129 else 130 tmo += tmp; /* else, set advancing stamp wake up time */ 131 132 while (get_timer_masked () < tmo)/* loop till event */ 133 /*NOP*/; 134} 135 136void reset_timer_masked (void) 137{ 138 /* reset time */ 139 lastdec = READ_TIMER; /* capure current decrementer value time */ 140 timestamp = 0; /* start "advancing" time stamp from 0 */ 141} 142 143ulong get_timer_masked (void) 144{ 145 ulong now = READ_TIMER; /* current tick value */ 146 147 if (lastdec >= now) { /* normal mode (non roll) */ 148 /* normal mode */ 149 timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */ 150 } else { /* we have overflow of the count down timer */ 151 /* nts = ts + ld + (TLV - now) 152 * ts=old stamp, ld=time that passed before passing through -1 153 * (TLV-now) amount of time after passing though -1 154 * nts = new "advancing time stamp"...it could also roll and cause problems. 155 */ 156 timestamp += lastdec + TIMER_LOAD_VAL - now; 157 } 158 lastdec = now; 159 160 return timestamp; 161} 162 163/* waits specified delay value and resets timestamp */ 164void udelay_masked (unsigned long usec) 165{ 166 ulong tmo; 167 ulong endtime; 168 signed long diff; 169 170 if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ 171 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ 172 tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ 173 tmo /= 1000; /* finish normalize. */ 174 } else { /* else small number, don't kill it prior to HZ multiply */ 175 tmo = usec * CONFIG_SYS_HZ; 176 tmo /= (1000*1000); 177 } 178 179 endtime = get_timer_masked () + tmo; 180 181 do { 182 ulong now = get_timer_masked (); 183 diff = endtime - now; 184 } while (diff >= 0); 185} 186 187/* 188 * This function is derived from PowerPC code (read timebase as long long). 189 * On ARM it just returns the timer value. 190 */ 191unsigned long long get_ticks(void) 192{ 193 return get_timer(0); 194} 195 196/* 197 * This function is derived from PowerPC code (timebase clock frequency). 198 * On ARM it returns the number of timer ticks per second. 199 */ 200ulong get_tbclk (void) 201{ 202 ulong tbclk; 203 204 tbclk = CONFIG_SYS_HZ; 205 return tbclk; 206} 207