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28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31
32
33
34#define CONFIG_RTC_MC146818
35
36
37
38
39
40#define DEBUG_PARSER
41
42#define CONFIG_X86 1
43#define CONFIG_SYS_SC520 1
44#define CONFIG_SYS_SC520_SSI
45#define CONFIG_SHOW_BOOT_PROGRESS 1
46#define CONFIG_LAST_STAGE_INIT 1
47
48
49
50
51
52#undef CONFIG_WATCHDOG
53#undef CONFIG_HW_WATCHDOG
54
55
56
57
58#undef CONFIG_VIDEO
59#undef CONFIG_CFB_CONSOLE
60
61
62
63
64#define CONFIG_MALLOC_SIZE (CONFIG_SYS_ENV_SIZE + 128*1024)
65
66#define CONFIG_BAUDRATE 9600
67
68
69
70
71#include <config_cmd_default.h>
72
73#define CONFIG_CMD_BDI
74#define CONFIG_CMD_BOOTD
75#define CONFIG_CMD_CONSOLE
76#define CONFIG_CMD_ECHO
77#define CONFIG_CMD_FLASH
78#define CONFIG_CMD_FPGA
79#define CONFIG_CMD_IMI
80#define CONFIG_CMD_IMLS
81#define CONFIG_CMD_IRQ
82#define CONFIG_CMD_ITEST
83#define CONFIG_CMD_LOADB
84#define CONFIG_CMD_LOADS
85#define CONFIG_CMD_MEMORY
86#define CONFIG_CMD_MISC
87#undef CONFIG_CMD_NET
88#undef CONFIG_CMD_NFS
89#define CONFIG_CMD_RUN
90#define CONFIG_CMD_SAVEENV
91#define CONFIG_CMD_SETGETDCR
92#define CONFIG_CMD_SOURCE
93#define CONFIG_CMD_XIMG
94
95#define CONFIG_BOOTDELAY 15
96#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
97
98
99#if defined(CONFIG_CMD_KGDB)
100#define CONFIG_KGDB_BAUDRATE 115200
101#define CONFIG_KGDB_SER_INDEX 2
102#endif
103
104
105
106
107#define CONFIG_SYS_LONGHELP
108#define CONFIG_SYS_PROMPT "boot > "
109#define CONFIG_SYS_CBSIZE 256
110#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
111 sizeof(CONFIG_SYS_PROMPT) + \
112 16)
113#define CONFIG_SYS_MAXARGS 16
114#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
115
116#define CONFIG_SYS_MEMTEST_START 0x00100000
117#define CONFIG_SYS_MEMTEST_END 0x01000000
118
119#define CONFIG_SYS_LOAD_ADDR 0x100000
120
121#define CONFIG_SYS_HZ 1024
122
123
124#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
125
126
127
128
129#define CONFIG_SYS_SDRAM_DRCTMCTL 0x18
130#define CONFIG_NR_DRAM_BANKS 4
131
132
133#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
134#undef CONFIG_SYS_SDRAM_REFRESH_RATE
135#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
136#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
137#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
138
139
140
141
142#define CONFIG_SYS_SC520_HIGH_SPEED 0
143#undef CONFIG_SYS_SC520_RESET
144#define CONFIG_SYS_SC520_TIMER
145#undef CONFIG_SYS_GENERIC_TIMER
146#undef CONFIG_SYS_TSC_TIMER
147#define CONFIG_SYS_USE_SIO_UART 0
148
149#define CONFIG_SYS_PCAT_INTERRUPTS
150#define CONFIG_SYS_NUM_IRQS 16
151
152
153
154
155#define CONFIG_SYS_STACK_SIZE 0x8000
156#define CONFIG_SYS_BL_START_FLASH 0x38040000
157#define CONFIG_SYS_BL_START_RAM 0x03fd0000
158#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
159#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
160#define CONFIG_SYS_FLASH_BASE 0x38000000
161#define CONFIG_SYS_FLASH_BASE_1 0x10000000
162#define CONFIG_SYS_FLASH_BASE_2 0x11000000
163
164
165#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
166#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
167
168
169#define CONFIG_ENV_OVERWRITE
170
171
172
173
174#define CONFIG_FLASH_CFI_DRIVER
175#define CONFIG_FLASH_CFI_LEGACY
176#define CONFIG_SYS_FLASH_CFI
177#define CONFIG_SYS_MAX_FLASH_BANKS 3
178#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, \
179 CONFIG_SYS_FLASH_BASE_1, \
180 CONFIG_SYS_FLASH_BASE_2}
181#define CONFIG_SYS_FLASH_EMPTY_INFO
182#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
183#define CONFIG_SYS_MAX_FLASH_SECT 128
184#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
185#define CONFIG_SYS_FLASH_LEGACY_512Kx8
186
187
188
189
190#define CONFIG_ENV_IS_IN_FLASH 1
191#define CONFIG_ENV_OFFSET 0x20000
192#define CONFIG_ENV_SIZE 0x08000
193#define CONFIG_ENV_SECT_SIZE 0x20000
194#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE_1 + \
195 CONFIG_ENV_OFFSET)
196#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
197 CONFIG_ENV_SECT_SIZE)
198#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
199
200
201
202
203
204#undef CONFIG_PCI
205#undef CONFIG_PCI_PNP
206#undef CONFIG_PCI_SCAN_SHOW
207#undef CONFIG_SYS_FIRST_PCI_IRQ
208#undef CONFIG_SYS_SECOND_PCI_IRQ
209#undef CONFIG_SYS_THIRD_PCI_IRQ
210#undef CONFIG_SYS_FORTH_PCI_IRQ
211
212
213
214
215#define CONFIG_SYS_WATCHDOG_PIO_BIT 0x8000
216#define CONFIG_SYS_WATCHDIG_PIO_DATA SC520_PIODATA15_0
217#define CONFIG_SYS_WATCHDIG_PIO_CLR SC520_PIOCLR15_0
218#define CONFIG_SYS_WATCHDIG_PIO_SET SC520_PIOSET15_0
219
220
221
222
223#define CONFIG_SYS_FPGA_PROGRAM_PIO_BIT 0x2000
224#define CONFIG_SYS_FPGA_INIT_PIO_BIT 0x4000
225#define CONFIG_SYS_FPGA_DONE_PIO_BIT 0x8000
226#define CONFIG_SYS_FPGA_PIO_DATA SC520_PIODATA31_16
227#define CONFIG_SYS_FPGA_PIO_DIRECTION SC520_PIODIR31_16
228#define CONFIG_SYS_FPGA_PIO_CLR SC520_PIOCLR31_16
229#define CONFIG_SYS_FPGA_PIO_SET SC520_PIOSET31_16
230#define CONFIG_SYS_FPGA_PROGRAM_BIT_DROP_TIME 1
231#define CONFIG_SYS_FPGA_MAX_INIT_TIME 10
232#define CONFIG_SYS_FPGA_MAX_FINALISE_TIME 10
233#define CONFIG_SYS_FPGA_SSI_DATA_RATE 8333
234
235#ifndef __ASSEMBLER__
236extern unsigned long ip;
237
238#define PRINTIP asm ("call next_line\n" \
239 "next_line:\n" \
240 "pop %%eax\n" \
241 "movl %%eax, %0\n" \
242 :"=r"(ip) \
243 : \
244 :"%eax"); \
245 printf("IP: 0x%08lx (File: %s, Line: %d)\n", ip, __FILE__, __LINE__);
246
247#endif
248#endif
249