uboot/board/omap730p2/omap730p2.c
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   1/*
   2 * (C) Copyright 2002
   3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4 * Marius Groeger <mgroeger@sysgo.de>
   5 *
   6 * (C) Copyright 2002
   7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8 *
   9 * (C) Copyright 2003
  10 * Texas Instruments, <www.ti.com>
  11 * Kshitij Gupta <Kshitij@ti.com>
  12 *
  13 * See file CREDITS for list of people who contributed to this
  14 * project.
  15 *
  16 * This program is free software; you can redistribute it and/or
  17 * modify it under the terms of the GNU General Public License as
  18 * published by the Free Software Foundation; either version 2 of
  19 * the License, or (at your option) any later version.
  20 *
  21 * This program is distributed in the hope that it will be useful,
  22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24 * GNU General Public License for more details.
  25 *
  26 * You should have received a copy of the GNU General Public License
  27 * along with this program; if not, write to the Free Software
  28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29 * MA 02111-1307 USA
  30 */
  31
  32#include <common.h>
  33#if defined(CONFIG_OMAP730)
  34#include <./configs/omap730.h>
  35#endif
  36
  37DECLARE_GLOBAL_DATA_PTR;
  38
  39int test_boot_mode(void);
  40void spin_up_leds(void);
  41void flash__init (void);
  42void ether__init (void);
  43void set_muxconf_regs (void);
  44void peripheral_power_enable (void);
  45
  46#define FLASH_ON_CS0    1
  47#define FLASH_ON_CS3    0
  48
  49static inline void delay (unsigned long loops)
  50{
  51        __asm__ volatile ("1:\n"
  52                          "subs %0, %1, #1\n"
  53                          "bne 1b":"=r" (loops):"0" (loops));
  54}
  55
  56int test_boot_mode(void)
  57{
  58        /* Check for CS0 and CS3 address decode swapping */
  59        if (*((volatile int *)EMIFS_CONFIG) & 0x00000002)
  60                return(FLASH_ON_CS3);
  61        else
  62                return(FLASH_ON_CS0);
  63}
  64
  65/* Toggle backup LED indication */
  66void toggle_backup_led(void)
  67{
  68        static int  backupLEDState = 0;  /* Init variable so that the LED will be ON the first time */
  69        volatile unsigned int *IOConfReg;
  70
  71
  72        IOConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT);
  73
  74        if (backupLEDState != 0) {
  75                *IOConfReg &= (0xFFFFEFFF);
  76                backupLEDState = 0;
  77        } else {
  78                *IOConfReg |= (0x00001000);
  79                backupLEDState = 1;
  80        }
  81}
  82
  83/*
  84 * Miscellaneous platform dependent initialisations
  85 */
  86
  87int board_init (void)
  88{
  89        /* arch number of OMAP 730 P2 Board - Same as the Innovator! */
  90        gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
  91
  92        /* adress of boot parameters */
  93        gd->bd->bi_boot_params = 0x10000100;
  94
  95        /* Configure MUX settings */
  96        set_muxconf_regs ();
  97
  98        peripheral_power_enable ();
  99
 100        /* Backup LED indication via GPIO_140 -> Red led if MUX correctly setup */
 101        toggle_backup_led();
 102
 103        /* Hold GSM in reset until needed */
 104        *((volatile unsigned short *)M_CTL) &= ~1;
 105
 106        /*
 107         *  CSx timings, GPIO Mux ... setup
 108         */
 109
 110        /* Flash: CS0 timings setup */
 111        *((volatile unsigned int *) FLASH_CFG_0) = 0x0000fff3;
 112        *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000088;
 113
 114        /* Ethernet support trough the debug board */
 115        /* CS1 timings setup */
 116        *((volatile unsigned int *) FLASH_CFG_1) = 0x0000fff3;
 117        *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000000;
 118
 119        /* this speeds up your boot a quite a bit.  However to make it
 120         *  work, you need make sure your kernel startup flush bug is fixed.
 121         *  ... rkw ...
 122         */
 123        icache_enable ();
 124
 125        flash__init ();
 126        ether__init ();
 127
 128        return 0;
 129}
 130
 131int misc_init_r (void)
 132{
 133        /* currently empty */
 134        return (0);
 135}
 136
 137/******************************
 138 Routine:
 139 Description:
 140******************************/
 141void flash__init (void)
 142{
 143        unsigned int regval;
 144
 145        regval = *((volatile unsigned int *) EMIFS_CONFIG);
 146        /* Turn off write protection for flash devices. */
 147        regval = regval | 0x0001;
 148        *((volatile unsigned int *) EMIFS_CONFIG) = regval;
 149}
 150
 151/*************************************************************
 152 Routine:ether__init
 153 Description: take the Ethernet controller out of reset and wait
 154                           for the EEPROM load to complete.
 155*************************************************************/
 156void ether__init (void)
 157{
 158#define LAN_RESET_REGISTER 0x0400001c
 159
 160        *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 161        do {
 162                *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
 163                udelay (100);
 164        } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
 165
 166        do {
 167                *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 168                udelay (100);
 169        } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
 170
 171#define ETH_CONTROL_REG 0x0400030b
 172
 173        *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
 174        udelay (100);
 175}
 176
 177/******************************
 178 Routine:
 179 Description:
 180******************************/
 181int dram_init (void)
 182{
 183        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 184        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 185
 186        return 0;
 187}
 188
 189/******************************************************
 190 Routine: set_muxconf_regs
 191 Description: Setting up the configuration Mux registers
 192                          specific to the hardware
 193*******************************************************/
 194void set_muxconf_regs (void)
 195{
 196        volatile unsigned int *MuxConfReg;
 197        /* set each registers to its reset value; */
 198
 199        /*
 200         *  Backup LED Indication
 201         */
 202
 203        /* Configure MUXed pin. Mode 6: GPIO_140 */
 204        MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF10);
 205        *MuxConfReg &= (0xFFFFFF1F);         /* Clear D_MPU_LPG1 */
 206        *MuxConfReg |= 0x000000C0;           /* Set D_MPU_LPG1 to 0x6 */
 207
 208        /* Configure GPIO_140 as output */
 209        MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL);
 210        *MuxConfReg &= (0xFFFFEFFF);         /* Clear direction (output) for GPIO 140 */
 211
 212        /*
 213         * Configure GPIOs for battery charge & feedback
 214         */
 215
 216        /* Configure MUXed pin. Mode 6: GPIO_35 */
 217        MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
 218        *MuxConfReg &= 0xFFFFFFF1;           /* Clear M_CLK_OUT */
 219        *MuxConfReg |= 0x0000000C;           /* Set M_CLK_OUT = 0x6 (GPIOs) */
 220
 221        /* Configure MUXed pin. Mode 6: GPIO_72,73,74 */
 222        MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF5);
 223        *MuxConfReg &= 0xFFFF1FFF;           /* Clear D_DDR */
 224        *MuxConfReg |= 0x0000C000;           /* Set D_DDR = 0x6 (GPIOs) */
 225
 226        MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL);
 227        *MuxConfReg |= 0x00000100;           /* Configure GPIO_72 as input */
 228        *MuxConfReg &= 0xFFFFFDFF;           /* Configure GPIO_73 as output     */
 229
 230        /*
 231         * Allow battery charge
 232         */
 233
 234        MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT);
 235        *MuxConfReg &= (0xFFFFFDFF);         /* Clear GPIO_73 pin */
 236
 237        /*
 238         * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 239         * It is used as the Ethernet controller interrupt
 240         */
 241        MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF9);
 242        *MuxConfReg &= 0x1FFFFFFF;
 243}
 244
 245/******************************************************
 246 Routine: peripheral_power_enable
 247 Description: Enable the power for UART1
 248*******************************************************/
 249void peripheral_power_enable (void)
 250{
 251        volatile unsigned int *MuxConfReg;
 252
 253
 254        /* Set up pins used by UART */
 255
 256        /* Start UART clock (48MHz) */
 257        MuxConfReg = (volatile unsigned int *) (PERSEUS_PCC_CONF_REG);
 258        *MuxConfReg &= (0xFFFFFFF7);
 259        *MuxConfReg |= (0x00000008);
 260
 261        /* Get the UART pin in mode0  */
 262        MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
 263        *MuxConfReg &= (0xFF1FFFFF);
 264        *MuxConfReg &= (0xF1FFFFFF);
 265}
 266