LXR uboot/cpu/mpc5xx/start.S

   1/*
   2 *  Copyright (C) 1998  Dan Malek <dmalek@jlc.net>
   3 *  Copyright (C) 1999  Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
   4 *  Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
   5 *  Copyright (C) 2003  Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   6 *
   7 * See file CREDITS for list of people who contributed to this
   8 * project.
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License as
  12 * published by the Free Software Foundation; either version 2 of
  13 * the License, or (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License
  21 * along with this program; if not, write to the Free Software
  22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23 * MA 02111-1307 USA
  24 */
  25
  26/*
  27 * File:                start.S
  28 *
  29 * Discription:         startup code
  30 *
  31 */
  32
  33#include <config.h>
  34#include <mpc5xx.h>
  35#include <timestamp.h>
  36#include <version.h>
  37
  38#define CONFIG_5xx 1            /* needed for Linux kernel header files */
  39#define _LINUX_CONFIG_H 1       /* avoid reading Linux autoconf.h file  */
  40
  41#include <ppc_asm.tmpl>
  42#include <ppc_defs.h>
  43
  44#include <linux/config.h>
  45#include <asm/processor.h>
  46
  47#ifndef  CONFIG_IDENT_STRING
  48#define  CONFIG_IDENT_STRING ""
  49#endif
  50
  51/* We don't have a MMU.
  52*/
  53#undef  MSR_KERNEL
  54#define MSR_KERNEL ( MSR_ME | MSR_RI )          /* Machine Check and Recoverable Interr. */
  55
  56/*
  57 * Set up GOT: Global Offset Table
  58 *
  59 * Use r14 to access the GOT
  60 */
  61        START_GOT
  62        GOT_ENTRY(_GOT2_TABLE_)
  63        GOT_ENTRY(_FIXUP_TABLE_)
  64
  65        GOT_ENTRY(_start)
  66        GOT_ENTRY(_start_of_vectors)
  67        GOT_ENTRY(_end_of_vectors)
  68        GOT_ENTRY(transfer_to_handler)
  69
  70        GOT_ENTRY(__init_end)
  71        GOT_ENTRY(_end)
  72        GOT_ENTRY(__bss_start)
  73        END_GOT
  74
  75/*
  76 * r3 - 1st arg to board_init(): IMMP pointer
  77 * r4 - 2nd arg to board_init(): boot flag
  78 */
  79        .text
  80        .long   0x27051956                      /* U-Boot Magic Number */
  81        .globl  version_string
  82version_string:
  83        .ascii U_BOOT_VERSION
  84        .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
  85        .ascii CONFIG_IDENT_STRING, "\0"
  86
  87        . = EXC_OFF_SYS_RESET
  88        .globl  _start
  89_start:
  90        mfspr   r3, 638
  91        li      r4, CONFIG_SYS_ISB                      /* Set ISB bit */
  92        or      r3, r3, r4
  93        mtspr   638, r3
  94        li      r21, BOOTFLAG_COLD              /* Normal Power-On: Boot from FLASH     */
  95        b       boot_cold
  96
  97        . = EXC_OFF_SYS_RESET + 0x20
  98
  99        .globl  _start_warm
 100_start_warm:
 101        li      r21, BOOTFLAG_WARM              /* Software reboot */
 102        b       boot_warm
 103
 104boot_cold:
 105boot_warm:
 106
 107        /* Initialize machine status; enable machine check interrupt            */
 108        /*----------------------------------------------------------------------*/
 109        li      r3, MSR_KERNEL                  /* Set ME, RI flags */
 110        mtmsr   r3
 111        mtspr   SRR1, r3                        /* Make SRR1 match MSR */
 112
 113        /* Initialize debug port registers                                      */
 114        /*----------------------------------------------------------------------*/
 115        xor     r0, r0, r0                      /* Clear R0 */
 116        mtspr   LCTRL1, r0                      /* Initialize debug port regs */
 117        mtspr   LCTRL2, r0
 118        mtspr   COUNTA, r0
 119        mtspr   COUNTB, r0
 120
 121#if defined(CONFIG_PATI)
 122        /* the external flash access on PATI fails if programming the PLL to 40MHz.
 123         * Copy the PLL programming code to the internal RAM and execute it
 124         *----------------------------------------------------------------------*/
 125        lis     r3, CONFIG_SYS_MONITOR_BASE@h
 126        ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
 127        addi    r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET
 128
 129        lis     r4, CONFIG_SYS_INIT_RAM_ADDR@h
 130        ori     r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
 131        mtlr    r4
 132        addis   r5,0,0x0
 133        ori     r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2)
 134        mtctr   r5
 135        addi    r3, r3, -4
 136        addi    r4, r4, -4
 1370:
 138        lwzu    r0,4(r3)
 139        stwu    r0,4(r4)
 140        bdnz    0b                /* copy loop */
 141        blrl
 142#endif
 143
 144        /*
 145         * Calculate absolute address in FLASH and jump there
 146         *----------------------------------------------------------------------*/
 147
 148        lis     r3, CONFIG_SYS_MONITOR_BASE@h
 149        ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
 150        addi    r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
 151        mtlr    r3
 152        blr
 153
 154in_flash:
 155
 156        /* Initialize some SPRs that are hard to access from C                  */
 157        /*----------------------------------------------------------------------*/
 158
 159        lis     r3, CONFIG_SYS_IMMR@h                   /* Pass IMMR as arg1 to C routine */
 160        lis     r2, CONFIG_SYS_INIT_SP_ADDR@h
 161        ori     r1, r2, CONFIG_SYS_INIT_SP_ADDR@l       /* Set up the stack in internal SRAM */
 162        /* Note: R0 is still 0 here */
 163        stwu    r0, -4(r1)                      /* Clear final stack frame so that      */
 164        stwu    r0, -4(r1)                      /* stack backtraces terminate cleanly   */
 165
 166        /*
 167         * Disable serialized ifetch and show cycles
 168         * (i.e. set processor to normal mode) for maximum
 169         * performance.
 170         */
 171
 172        li      r2, 0x0007
 173        mtspr   ICTRL, r2
 174
 175        /* Set up debug mode entry */
 176
 177        lis     r2, CONFIG_SYS_DER@h
 178        ori     r2, r2, CONFIG_SYS_DER@l
 179        mtspr   DER, r2
 180
 181        /* Let the C-code set up the rest                                       */
 182        /*                                                                      */
 183        /* Be careful to keep code relocatable !                                */
 184        /*----------------------------------------------------------------------*/
 185
 186        GET_GOT                 /* initialize GOT access                        */
 187
 188        /* r3: IMMR */
 189        bl      cpu_init_f      /* run low-level CPU init code     (from Flash) */
 190
 191        mr      r3, r21
 192        /* r3: BOOTFLAG */
 193        bl      board_init_f    /* run 1st part of board init code (from Flash) */
 194
 195
 196        .globl  _start_of_vectors
 197_start_of_vectors:
 198
 199/* Machine check */
 200        STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
 201
 202/* Data Storage exception.  "Never" generated on the 860. */
 203        STD_EXCEPTION(0x300, DataStorage, UnknownException)
 204
 205/* Instruction Storage exception.  "Never" generated on the 860. */
 206        STD_EXCEPTION(0x400, InstStorage, UnknownException)
 207
 208/* External Interrupt exception. */
 209        STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
 210
 211/* Alignment exception. */
 212        . = 0x600
 213Alignment:
 214        EXCEPTION_PROLOG(SRR0, SRR1)
 215        mfspr   r4,DAR
 216        stw     r4,_DAR(r21)
 217        mfspr   r5,DSISR
 218        stw     r5,_DSISR(r21)
 219        addi    r3,r1,STACK_FRAME_OVERHEAD
 220        li      r20,MSR_KERNEL
 221        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
 222        lwz     r6,GOT(transfer_to_handler)
 223        mtlr    r6
 224        blrl
 225.L_Alignment:
 226        .long   AlignmentException - _start + EXC_OFF_SYS_RESET
 227        .long   int_return - _start + EXC_OFF_SYS_RESET
 228
 229/* Program check exception */
 230        . = 0x700
 231ProgramCheck:
 232        EXCEPTION_PROLOG(SRR0, SRR1)
 233        addi    r3,r1,STACK_FRAME_OVERHEAD
 234        li      r20,MSR_KERNEL
 235        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
 236        lwz     r6,GOT(transfer_to_handler)
 237        mtlr    r6
 238        blrl
 239.L_ProgramCheck:
 240        .long   ProgramCheckException - _start + EXC_OFF_SYS_RESET
 241        .long   int_return - _start + EXC_OFF_SYS_RESET
 242
 243        /* FPU on MPC5xx available. We will use it later.
 244        */
 245        STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
 246
 247        /* I guess we could implement decrementer, and may have
 248         * to someday for timekeeping.
 249         */
 250        STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 251        STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 252        STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 253        STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 254        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 255
 256        STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
 257        STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
 258
 259        /* On the MPC8xx, this is a software emulation interrupt.  It occurs
 260         * for all unimplemented and illegal instructions.
 261         */
 262        STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
 263        STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
 264        STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
 265        STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
 266        STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
 267
 268        STD_EXCEPTION(0x1500, Reserved5, UnknownException)
 269        STD_EXCEPTION(0x1600, Reserved6, UnknownException)
 270        STD_EXCEPTION(0x1700, Reserved7, UnknownException)
 271        STD_EXCEPTION(0x1800, Reserved8, UnknownException)
 272        STD_EXCEPTION(0x1900, Reserved9, UnknownException)
 273        STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
 274        STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
 275
 276        STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
 277        STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
 278        STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
 279        STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
 280
 281
 282        .globl  _end_of_vectors
 283_end_of_vectors:
 284
 285
 286        . = 0x2000
 287
 288/*
 289 * This code finishes saving the registers to the exception frame
 290 * and jumps to the appropriate handler for the exception.
 291 * Register r21 is pointer into trap frame, r1 has new stack pointer.
 292 */
 293        .globl  transfer_to_handler
 294transfer_to_handler:
 295        stw     r22,_NIP(r21)
 296        lis     r22,MSR_POW@h
 297        andc    r23,r23,r22
 298        stw     r23,_MSR(r21)
 299        SAVE_GPR(7, r21)
 300        SAVE_4GPRS(8, r21)
 301        SAVE_8GPRS(12, r21)
 302        SAVE_8GPRS(24, r21)
 303        mflr    r23
 304        andi.   r24,r23,0x3f00          /* get vector offset */
 305        stw     r24,TRAP(r21)
 306        li      r22,0
 307        stw     r22,RESULT(r21)
 308        mtspr   SPRG2,r22               /* r1 is now kernel sp */
 309        lwz     r24,0(r23)              /* virtual address of handler */
 310        lwz     r23,4(r23)              /* where to go when done */
 311        mtspr   SRR0,r24
 312        mtspr   SRR1,r20
 313        mtlr    r23
 314        SYNC
 315        rfi                             /* jump to handler, enable MMU */
 316
 317int_return:
 318        mfmsr   r28                     /* Disable interrupts */
 319        li      r4,0
 320        ori     r4,r4,MSR_EE
 321        andc    r28,r28,r4
 322        SYNC                            /* Some chip revs need this... */
 323        mtmsr   r28
 324        SYNC
 325        lwz     r2,_CTR(r1)
 326        lwz     r0,_LINK(r1)
 327        mtctr   r2
 328        mtlr    r0
 329        lwz     r2,_XER(r1)
 330        lwz     r0,_CCR(r1)
 331        mtspr   XER,r2
 332        mtcrf   0xFF,r0
 333        REST_10GPRS(3, r1)
 334        REST_10GPRS(13, r1)
 335        REST_8GPRS(23, r1)
 336        REST_GPR(31, r1)
 337        lwz     r2,_NIP(r1)             /* Restore environment */
 338        lwz     r0,_MSR(r1)
 339        mtspr   SRR0,r2
 340        mtspr   SRR1,r0
 341        lwz     r0,GPR0(r1)
 342        lwz     r2,GPR2(r1)
 343        lwz     r1,GPR1(r1)
 344        SYNC
 345        rfi
 346
 347
 348/*
 349 * unsigned int get_immr (unsigned int mask)
 350 *
 351 * return (mask ? (IMMR & mask) : IMMR);
 352 */
 353        .globl  get_immr
 354get_immr:
 355        mr      r4,r3           /* save mask */
 356        mfspr   r3, IMMR        /* IMMR */
 357        cmpwi   0,r4,0          /* mask != 0 ? */
 358        beq     4f
 359        and     r3,r3,r4        /* IMMR & mask */
 3604:
 361        blr
 362
 363        .globl get_pvr
 364get_pvr:
 365        mfspr   r3, PVR
 366        blr
 367
 368
 369/*------------------------------------------------------------------------------*/
 370
 371/*
 372 * void relocate_code (addr_sp, gd, addr_moni)
 373 *
 374 * This "function" does not return, instead it continues in RAM
 375 * after relocating the monitor code.
 376 *
 377 * r3 = dest
 378 * r4 = src
 379 * r5 = length in bytes
 380 * r6 = cachelinesize
 381 */
 382        .globl  relocate_code
 383relocate_code:
 384        mr      r1,  r3         /* Set new stack pointer in SRAM        */
 385        mr      r9,  r4         /* Save copy of global data pointer in SRAM */
 386        mr      r10, r5         /* Save copy of monitor destination Address in SRAM */
 387
 388        mr      r3,  r5                         /* Destination Address  */
 389        lis     r4, CONFIG_SYS_MONITOR_BASE@h           /* Source      Address  */
 390        ori     r4, r4, CONFIG_SYS_MONITOR_BASE@l
 391        lwz     r5, GOT(__init_end)
 392        sub     r5, r5, r4
 393
 394        /*
 395         * Fix GOT pointer:
 396         *
 397         * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
 398         *
 399         * Offset:
 400         */
 401        sub     r15, r10, r4
 402
 403        /* First our own GOT */
 404        add     r14, r14, r15
 405        /* the the one used by the C code */
 406        add     r30, r30, r15
 407
 408        /*
 409         * Now relocate code
 410         */
 411
 412        cmplw   cr1,r3,r4
 413        addi    r0,r5,3
 414        srwi.   r0,r0,2
 415        beq     cr1,4f          /* In place copy is not necessary       */
 416        beq     4f              /* Protect against 0 count              */
 417        mtctr   r0
 418        bge     cr1,2f
 419
 420        la      r8,-4(r4)
 421        la      r7,-4(r3)
 4221:      lwzu    r0,4(r8)
 423        stwu    r0,4(r7)
 424        bdnz    1b
 425        b       4f
 426
 4272:      slwi    r0,r0,2
 428        add     r8,r4,r0
 429        add     r7,r3,r0
 4303:      lwzu    r0,-4(r8)
 431        stwu    r0,-4(r7)
 432        bdnz    3b
 433
 4344:      sync
 435        isync
 436
 437/*
 438 * We are done. Do not return, instead branch to second part of board
 439 * initialization, now running from RAM.
 440 */
 441
 442        addi    r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
 443        mtlr    r0
 444        blr
 445
 446in_ram:
 447
 448        /*
 449         * Relocation Function, r14 point to got2+0x8000
 450         *
 451         * Adjust got2 pointers, no need to check for 0, this code
 452         * already puts a few entries in the table.
 453         */
 454        li      r0,__got2_entries@sectoff@l
 455        la      r3,GOT(_GOT2_TABLE_)
 456        lwz     r11,GOT(_GOT2_TABLE_)
 457        mtctr   r0
 458        sub     r11,r3,r11
 459        addi    r3,r3,-4
 4601:      lwzu    r0,4(r3)
 461        add     r0,r0,r11
 462        stw     r0,0(r3)
 463        bdnz    1b
 464
 465        /*
 466         * Now adjust the fixups and the pointers to the fixups
 467         * in case we need to move ourselves again.
 468         */
 4692:      li      r0,__fixup_entries@sectoff@l
 470        lwz     r3,GOT(_FIXUP_TABLE_)
 471        cmpwi   r0,0
 472        mtctr   r0
 473        addi    r3,r3,-4
 474        beq     4f
 4753:      lwzu    r4,4(r3)
 476        lwzux   r0,r4,r11
 477        add     r0,r0,r11
 478        stw     r10,0(r3)
 479        stw     r0,0(r4)
 480        bdnz    3b
 4814:
 482clear_bss:
 483        /*
 484         * Now clear BSS segment
 485         */
 486        lwz     r3,GOT(__bss_start)
 487        lwz     r4,GOT(_end)
 488        cmplw   0, r3, r4
 489        beq     6f
 490
 491        li      r0, 0
 4925:
 493        stw     r0, 0(r3)
 494        addi    r3, r3, 4
 495        cmplw   0, r3, r4
 496        bne     5b
 4976:
 498
 499        mr      r3, r9          /* Global Data pointer          */
 500        mr      r4, r10         /* Destination Address          */
 501        bl      board_init_r
 502
 503        /*
 504         * Copy exception vector code to low memory
 505         *
 506         * r3: dest_addr
 507         * r7: source address, r8: end address, r9: target address
 508         */
 509        .globl  trap_init
 510trap_init:
 511        lwz     r7, GOT(_start)
 512        lwz     r8, GOT(_end_of_vectors)
 513
 514        li      r9, 0x100               /* reset vector always at 0x100 */
 515
 516        cmplw   0, r7, r8
 517        bgelr                           /* return if r7>=r8 - just in case */
 518
 519        mflr    r4                      /* save link register           */
 5201:
 521        lwz     r0, 0(r7)
 522        stw     r0, 0(r9)
 523        addi    r7, r7, 4
 524        addi    r9, r9, 4
 525        cmplw   0, r7, r8
 526        bne     1b
 527
 528        /*
 529         * relocate `hdlr' and `int_return' entries
 530         */
 531        li      r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
 532        li      r8, Alignment - _start + EXC_OFF_SYS_RESET
 5332:
 534        bl      trap_reloc
 535        addi    r7, r7, 0x100           /* next exception vector        */
 536        cmplw   0, r7, r8
 537        blt     2b
 538
 539        li      r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
 540        bl      trap_reloc
 541
 542        li      r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
 543        bl      trap_reloc
 544
 545        li      r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
 546        li      r8, SystemCall - _start + EXC_OFF_SYS_RESET
 5473:
 548        bl      trap_reloc
 549        addi    r7, r7, 0x100           /* next exception vector        */
 550        cmplw   0, r7, r8
 551        blt     3b
 552
 553        li      r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
 554        li      r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
 5554:
 556        bl      trap_reloc
 557        addi    r7, r7, 0x100           /* next exception vector        */
 558        cmplw   0, r7, r8
 559        blt     4b
 560
 561        mtlr    r4                      /* restore link register        */
 562        blr
 563
 564        /*
 565         * Function: relocate entries for one exception vector
 566         */
 567trap_reloc:
 568        lwz     r0, 0(r7)               /* hdlr ...                     */
 569        add     r0, r0, r3              /*  ... += dest_addr            */
 570        stw     r0, 0(r7)
 571
 572        lwz     r0, 4(r7)               /* int_return ...               */
 573        add     r0, r0, r3              /*  ... += dest_addr            */
 574        stw     r0, 4(r7)
 575
 576        sync
 577        isync
 578
 579        blr
 580
 581
 582#if defined(CONFIG_PATI)
 583/* Program the PLL */
 584pll_prog_code_start:
 585        lis     r4, (CONFIG_SYS_IMMR + 0x002fc384)@h
 586        ori     r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l
 587        lis     r3, (0x55ccaa33)@h
 588        ori     r3, r3, (0x55ccaa33)@l
 589        stw     r3, 0(r4)
 590        lis     r4, (CONFIG_SYS_IMMR + 0x002fc284)@h
 591        ori     r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l
 592        lis     r3, CONFIG_SYS_PLPRCR@h
 593        ori     r3, r3, CONFIG_SYS_PLPRCR@l
 594        stw     r3, 0(r4)
 595        addis   r3,0,0x0
 596        ori     r3,r3,0xA000
 597        mtctr   r3
 598..spinlp:
 599  bdnz    ..spinlp                /* spin loop */
 600        blr
 601pll_prog_code_end:
 602        nop
 603        blr
 604#endif
 605