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343#include <config.h>
344
345#include "h/skversion.h"
346#if 0
347#include <linux/module.h>
348#include <linux/init.h>
349#include <linux/proc_fs.h>
350#endif
351#include "h/skdrv1st.h"
352#include "h/skdrv2nd.h"
353
354
355
356
357
358
359
360#if 0
361#define SK_ZEROCOPY
362#endif
363
364
365#define USE_TX_COMPLETE
366
367
368#define USE_INT_MOD
369#define INTS_PER_SEC 1000
370
371
372
373
374
375#define SK_COPY_THRESHOLD 50
376
377
378#define SK_MAX_CARD_PARAM 16
379
380
381
382
383
384
385
386
387
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389
390
391
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395
396
397
398#define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
399#define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
400#define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
401
402
403static void FreeResources(struct SK_NET_DEVICE *dev);
404static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
405static SK_BOOL BoardAllocMem(SK_AC *pAC);
406static void BoardFreeMem(SK_AC *pAC);
407static void BoardInitMem(SK_AC *pAC);
408static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**,
409 int*, SK_BOOL);
410
411#if 0
412static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
413static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
414static int SkGeOpen(struct SK_NET_DEVICE *dev);
415static int SkGeClose(struct SK_NET_DEVICE *dev);
416static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
417static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
418static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
419static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
420static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
421#else
422void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
423void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
424int SkGeOpen(struct SK_NET_DEVICE *dev);
425int SkGeClose(struct SK_NET_DEVICE *dev);
426int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
427#endif
428static void GetConfiguration(SK_AC*);
429static void ProductStr(SK_AC*);
430static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
431static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
432static void FillRxRing(SK_AC*, RX_PORT*);
433static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
434#if 0
435static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
436#else
437void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
438#endif
439static void ClearAndStartRx(SK_AC*, int);
440static void ClearTxIrq(SK_AC*, int, int);
441static void ClearRxRing(SK_AC*, RX_PORT*);
442static void ClearTxRing(SK_AC*, TX_PORT*);
443#if 0
444static void SetQueueSizes(SK_AC *pAC);
445
446static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
447#endif
448static void PortReInitBmu(SK_AC*, int);
449#if 0
450static int SkGeIocMib(DEV_NET*, unsigned int, int);
451static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
452#endif
453
454
455
456
457extern int proc_read(
458 char *buffer,
459 char **buffer_location,
460 off_t offset,
461 int buffer_length,
462 int *eof,
463 void *data);
464
465#ifdef DEBUG
466static void DumpMsg(struct sk_buff*, char*);
467static void DumpData(char*, int);
468static void DumpLong(char*, int);
469#endif
470void dump_frag( SK_U8 *data, int length);
471
472
473#if 0
474static const char *BootString = BOOT_STRING;
475#endif
476struct SK_NET_DEVICE *SkGeRootDev = NULL;
477static int probed __initdata = 0;
478
479
480static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
481static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
482
483
484
485const char SK_Root_Dir_entry[8];
486
487#if 0
488static struct proc_dir_entry *pSkRootDir;
489#endif
490
491
492static struct pci_device_id supported[] = {
493 {PCI_VENDOR_ID_3COM, 0x1700},
494 {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE},
495 {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU},
496 {}
497};
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513#if 0
514static int __init skge_probe (void)
515#else
516int skge_probe (struct eth_device ** ret_dev)
517#endif
518{
519#if 0
520 int proc_root_initialized = 0;
521#endif
522 int boards_found = 0;
523#if 0
524 int vendor_flag = SK_FALSE;
525#endif
526 SK_AC *pAC;
527 DEV_NET *pNet = NULL;
528#if 0
529 struct proc_dir_entry *pProcFile;
530 struct pci_dev *pdev = NULL;
531 unsigned long base_address;
532#else
533 u32 base_address;
534#endif
535 struct SK_NET_DEVICE *dev = NULL;
536#if 0
537 SK_BOOL DeviceFound = SK_FALSE;
538#endif
539 SK_BOOL BootStringCount = SK_FALSE;
540#if 1
541 pci_dev_t devno;
542#endif
543
544 if (probed)
545 return -ENODEV;
546 probed++;
547
548 if (!pci_present())
549 return -ENODEV;
550
551#if 0
552 while((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev)))
553#else
554 while((devno = pci_find_devices (supported, boards_found)) >= 0)
555#endif
556 {
557
558 dev = NULL;
559 pNet = NULL;
560
561
562#if 0
563 SK_PCI_ISCOMPLIANT(vendor_flag, pdev);
564 if (!vendor_flag)
565 continue;
566#endif
567
568
569
570
571
572
573
574#if 0
575
576 if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff) &&
577 pci_set_dma_mask(pdev, (u64) 0xffffffff))
578 continue;
579#endif
580
581
582#if 0
583 if ((dev = init_etherdev(dev, sizeof(DEV_NET))) == NULL) {
584 printk(KERN_ERR "Unable to allocate etherdev "
585 "structure!\n");
586 break;
587 }
588#else
589 dev = malloc (sizeof *dev);
590 memset(dev, 0, sizeof(*dev));
591 dev->priv = malloc(sizeof(DEV_NET));
592#endif
593
594 if (dev->priv == NULL) {
595 printk(KERN_ERR "Unable to allocate adapter "
596 "structure!\n");
597 break;
598 }
599
600 pNet = dev->priv;
601 pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
602 if (pNet->pAC == NULL){
603 kfree(dev->priv);
604 printk(KERN_ERR "Unable to allocate adapter "
605 "structure!\n");
606 break;
607 }
608
609
610 if (!BootStringCount) {
611
612
613 BootStringCount = SK_TRUE;
614#ifdef SK98_INFO
615 printk("%s\n", BootString);
616#endif
617 }
618
619 memset(pNet->pAC, 0, sizeof(SK_AC));
620 pAC = pNet->pAC;
621#if 0
622 pAC->PciDev = pdev;
623 pAC->PciDevId = pdev->device;
624 pAC->dev[0] = dev;
625 pAC->dev[1] = dev;
626#else
627 pAC->PciDev = devno;
628 ret_dev[0] = pAC->dev[0] = dev;
629 ret_dev[1] = pAC->dev[1] = dev;
630#endif
631 sprintf(pAC->Name, "SysKonnect SK-98xx");
632 pAC->CheckQueue = SK_FALSE;
633
634 pNet->Mtu = 1500;
635 pNet->Up = 0;
636#if 0
637 dev->irq = pdev->irq;
638
639 dev->open = &SkGeOpen;
640 dev->stop = &SkGeClose;
641 dev->hard_start_xmit = &SkGeXmit;
642 dev->get_stats = &SkGeStats;
643 dev->set_multicast_list = &SkGeSetRxMode;
644 dev->set_mac_address = &SkGeSetMacAddr;
645 dev->do_ioctl = &SkGeIoctl;
646 dev->change_mtu = &SkGeChangeMtu;
647 dev->flags &= ~IFF_RUNNING;
648#endif
649
650#ifdef SK_ZEROCOPY
651 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
652
653
654 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
655 }
656#endif
657
658#if 0
659
660
661
662 dev->base_addr = 42;
663 pci_set_master(pdev);
664
665 pci_set_master(pdev);
666 base_address = pci_resource_start (pdev, 0);
667#else
668 pci_write_config_dword(devno,
669 PCI_COMMAND,
670 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
671 pci_read_config_dword (devno, PCI_BASE_ADDRESS_0,
672 &base_address);
673#endif
674
675#ifdef SK_BIG_ENDIAN
676
677
678
679
680 {
681 SK_U32 our2;
682 SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
683 our2 |= PCI_REV_DESC;
684 SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
685 }
686#endif
687
688
689
690
691#if 0
692 pAC->IoBase = (char*)ioremap(base_address, 0x4000);
693#else
694 pAC->IoBase = (char*)pci_mem_to_phys(devno, base_address);
695#endif
696
697 if (!pAC->IoBase){
698 printk(KERN_ERR "%s: Unable to map I/O register, "
699 "SK 98xx No. %i will be disabled.\n",
700 dev->name, boards_found);
701 kfree(dev);
702 break;
703 }
704
705 pAC->Index = boards_found;
706 if (SkGeBoardInit(dev, pAC)) {
707 FreeResources(dev);
708 kfree(dev);
709 continue;
710 }
711
712#if 0
713 memcpy((caddr_t) &dev->dev_addr,
714 (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
715#else
716 memcpy((caddr_t) &dev->enetaddr,
717 (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
718#endif
719
720#if 0
721
722 if (!DeviceFound) {
723 DeviceFound = SK_TRUE;
724 SK_MEMCPY(&SK_Root_Dir_entry, BootString,
725 sizeof(SK_Root_Dir_entry) - 1);
726
727
728 if(!proc_root_initialized) {
729 pSkRootDir = create_proc_entry(SK_Root_Dir_entry,
730 S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
731 proc_root_initialized = 1;
732 }
733
734 pSkRootDir->owner = THIS_MODULE;
735 }
736
737
738
739 pProcFile = create_proc_entry(dev->name,
740 S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
741 pSkRootDir);
742
743
744 pProcFile->read_proc = proc_read;
745 pProcFile->write_proc = NULL;
746 pProcFile->nlink = 1;
747 pProcFile->size = sizeof(dev->name + 1);
748 pProcFile->data = (void *)pProcFile;
749#endif
750
751 pNet->PortNr = 0;
752 pNet->NetNr = 0;
753
754#ifdef SK_ZEROCOPY
755 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
756
757 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
758 }
759#endif
760
761 boards_found++;
762
763
764 if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
765#if 0
766 if ((dev = init_etherdev(NULL, sizeof(DEV_NET))) == 0) {
767 printk(KERN_ERR "Unable to allocate etherdev "
768 "structure!\n");
769 break;
770 }
771#else
772 dev = malloc (sizeof *dev);
773 memset(dev, 0, sizeof(*dev));
774 dev->priv = malloc(sizeof(DEV_NET));
775#endif
776
777 pAC->dev[1] = dev;
778 pNet = dev->priv;
779 pNet->PortNr = 1;
780 pNet->NetNr = 1;
781 pNet->pAC = pAC;
782 pNet->Mtu = 1500;
783 pNet->Up = 0;
784
785#if 0
786 dev->open = &SkGeOpen;
787 dev->stop = &SkGeClose;
788 dev->hard_start_xmit = &SkGeXmit;
789 dev->get_stats = &SkGeStats;
790 dev->set_multicast_list = &SkGeSetRxMode;
791 dev->set_mac_address = &SkGeSetMacAddr;
792 dev->do_ioctl = &SkGeIoctl;
793 dev->change_mtu = &SkGeChangeMtu;
794 dev->flags &= ~IFF_RUNNING;
795#endif
796
797#ifdef SK_ZEROCOPY
798 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
799
800 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
801 }
802#endif
803
804#if 0
805 pProcFile = create_proc_entry(dev->name,
806 S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
807 pSkRootDir);
808
809
810 pProcFile->read_proc = proc_read;
811 pProcFile->write_proc = NULL;
812 pProcFile->nlink = 1;
813 pProcFile->size = sizeof(dev->name + 1);
814 pProcFile->data = (void *)pProcFile;
815#endif
816
817#if 0
818 memcpy((caddr_t) &dev->dev_addr,
819 (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
820#else
821 memcpy((caddr_t) &dev->enetaddr,
822 (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
823#endif
824
825 printk("%s: %s\n", dev->name, pAC->DeviceStr);
826 printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
827
828 }
829
830
831
832 pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
833 (pAC->GIni.GIPciHwRev & 0x0F);
834
835
836
837
838
839#if 0
840#ifndef MODULE
841 dev->base_addr = 0;
842#endif
843#endif
844 }
845
846
847
848
849
850
851
852 return boards_found;
853}
854
855
856
857
858
859
860
861
862
863
864
865
866
867static void FreeResources(struct SK_NET_DEVICE *dev)
868{
869SK_U32 AllocFlag;
870DEV_NET *pNet;
871SK_AC *pAC;
872
873 if (dev->priv) {
874 pNet = (DEV_NET*) dev->priv;
875 pAC = pNet->pAC;
876 AllocFlag = pAC->AllocFlag;
877#if 0
878 if (AllocFlag & SK_ALLOC_IRQ) {
879 free_irq(dev->irq, dev);
880 }
881 if (pAC->IoBase) {
882 iounmap(pAC->IoBase);
883 }
884#endif
885 if (pAC->pDescrMem) {
886 BoardFreeMem(pAC);
887 }
888 }
889
890}
891
892#if 0
893MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
894MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
895MODULE_LICENSE("GPL");
896MODULE_PARM(Speed_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
897MODULE_PARM(Speed_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
898MODULE_PARM(AutoNeg_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
899MODULE_PARM(AutoNeg_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
900MODULE_PARM(DupCap_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
901MODULE_PARM(DupCap_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
902MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
903MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
904MODULE_PARM(Role_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
905MODULE_PARM(Role_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
906MODULE_PARM(PrefPort, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
907MODULE_PARM(RlmtMode, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
908
909MODULE_PARM(options, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
910MODULE_PARM(debug, "i");
911#endif
912
913
914#ifdef LINK_SPEED_A
915static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED_A;
916#else
917static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
918#endif
919
920#ifdef LINK_SPEED_B
921static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED_B;
922#else
923static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
924#endif
925
926#ifdef AUTO_NEG_A
927static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
928#else
929static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
930#endif
931
932#ifdef DUP_CAP_A
933static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
934#else
935static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
936#endif
937
938#ifdef FLOW_CTRL_A
939static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
940#else
941static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
942#endif
943
944#ifdef ROLE_A
945static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
946#else
947static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
948#endif
949
950#ifdef AUTO_NEG_B
951static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
952#else
953static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
954#endif
955
956#ifdef DUP_CAP_B
957static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
958#else
959static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
960#endif
961
962#ifdef FLOW_CTRL_B
963static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
964#else
965static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
966#endif
967
968#ifdef ROLE_B
969static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
970#else
971static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
972#endif
973
974#ifdef PREF_PORT
975static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
976#else
977static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
978#endif
979
980#ifdef RLMT_MODE
981static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
982#else
983static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
984#endif
985
986#if 0
987static int debug = 0;
988static int options[SK_MAX_CARD_PARAM] = {0, };
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002static int __init skge_init_module(void)
1003{
1004 int cards;
1005 SkGeRootDev = NULL;
1006
1007
1008 debug = 0;
1009 options[0] = 0;
1010
1011 cards = skge_probe();
1012 if (cards == 0) {
1013 printk("sk98lin: No adapter found.\n");
1014 }
1015 return cards ? 0 : -ENODEV;
1016}
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029static void __exit skge_cleanup_module(void)
1030{
1031DEV_NET *pNet;
1032SK_AC *pAC;
1033struct SK_NET_DEVICE *next;
1034unsigned long Flags;
1035SK_EVPARA EvPara;
1036
1037 while (SkGeRootDev) {
1038 pNet = (DEV_NET*) SkGeRootDev->priv;
1039 pAC = pNet->pAC;
1040 next = pAC->Next;
1041
1042 netif_stop_queue(SkGeRootDev);
1043 SkGeYellowLED(pAC, pAC->IoBase, 0);
1044
1045 if(pAC->BoardLevel == 2) {
1046
1047 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1048 EvPara.Para32[0] = 0;
1049 EvPara.Para32[1] = -1;
1050 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1051 EvPara.Para32[0] = 1;
1052 EvPara.Para32[1] = -1;
1053 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1054 SkEventDispatcher(pAC, pAC->IoBase);
1055
1056 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1057 SkGeDeInit(pAC, pAC->IoBase);
1058 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1059 pAC->BoardLevel = 0;
1060
1061 }
1062
1063 if(pAC->BoardLevel == 1) {
1064
1065 SkGeDeInit(pAC, pAC->IoBase);
1066 pAC->BoardLevel = 0;
1067 }
1068
1069 if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
1070 unregister_netdev(pAC->dev[1]);
1071 kfree(pAC->dev[1]);
1072 }
1073
1074 FreeResources(SkGeRootDev);
1075
1076 SkGeRootDev->get_stats = NULL;
1077
1078
1079
1080
1081 unregister_netdev(SkGeRootDev);
1082 kfree(SkGeRootDev);
1083 kfree(pAC);
1084 SkGeRootDev = next;
1085 }
1086
1087
1088 remove_proc_entry(pSkRootDir->name, proc_net);
1089
1090}
1091
1092module_init(skge_init_module);
1093module_exit(skge_cleanup_module);
1094#endif
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
1111{
1112short i;
1113unsigned long Flags;
1114char *DescrString = "sk98lin: Driver for Linux";
1115char *VerStr = VER_STRING;
1116#if 0
1117int Ret;
1118#endif
1119SK_BOOL DualNet;
1120
1121 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1122 ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
1123 for (i=0; i<SK_MAX_MACS; i++) {
1124 pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
1125 pAC->TxPort[i][0].PortIndex = i;
1126 pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
1127 pAC->RxPort[i].PortIndex = i;
1128 }
1129
1130
1131 for (i=0; i<SK_MAX_MACS; i++) {
1132 spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
1133 spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
1134 }
1135 spin_lock_init(&pAC->SlowPathLock);
1136
1137
1138
1139 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1140
1141 if (SkGeInit(pAC, pAC->IoBase, 0) != 0) {
1142 printk("HWInit (0) failed.\n");
1143 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1144 return(-EAGAIN);
1145 }
1146 SkI2cInit( pAC, pAC->IoBase, 0);
1147 SkEventInit(pAC, pAC->IoBase, 0);
1148 SkPnmiInit( pAC, pAC->IoBase, 0);
1149 SkAddrInit( pAC, pAC->IoBase, 0);
1150 SkRlmtInit( pAC, pAC->IoBase, 0);
1151 SkTimerInit(pAC, pAC->IoBase, 0);
1152
1153 pAC->BoardLevel = 0;
1154 pAC->RxBufSize = ETH_BUF_SIZE;
1155
1156 SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
1157 SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
1158
1159 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1160
1161
1162 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1163 if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
1164 printk("HWInit (1) failed.\n");
1165 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1166 return(-EAGAIN);
1167 }
1168 SkI2cInit( pAC, pAC->IoBase, 1);
1169 SkEventInit(pAC, pAC->IoBase, 1);
1170 SkPnmiInit( pAC, pAC->IoBase, 1);
1171 SkAddrInit( pAC, pAC->IoBase, 1);
1172 SkRlmtInit( pAC, pAC->IoBase, 1);
1173 SkTimerInit(pAC, pAC->IoBase, 1);
1174
1175 GetConfiguration(pAC);
1176 if (pAC->RlmtNets == 2) {
1177 pAC->GIni.GIPortUsage = SK_MUL_LINK;
1178 }
1179
1180 pAC->BoardLevel = 1;
1181 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1182
1183#if 0
1184 if (pAC->GIni.GIMacsFound == 2) {
1185 Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
1186 } else if (pAC->GIni.GIMacsFound == 1) {
1187 Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
1188 pAC->Name, dev);
1189 } else {
1190 printk(KERN_WARNING "%s: Illegal number of ports: %d\n",
1191 dev->name, pAC->GIni.GIMacsFound);
1192 return -EAGAIN;
1193 }
1194
1195 if (Ret) {
1196 printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
1197 dev->name, dev->irq);
1198 return -EAGAIN;
1199 }
1200#endif
1201 pAC->AllocFlag |= SK_ALLOC_IRQ;
1202
1203
1204 if(!BoardAllocMem(pAC)) {
1205 printk("No memory for descriptor rings.\n");
1206 return(-EAGAIN);
1207 }
1208
1209 SkCsSetReceiveFlags(pAC,
1210 SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
1211 &pAC->CsOfs1, &pAC->CsOfs2, 0);
1212 pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
1213
1214 BoardInitMem(pAC);
1215#if 0
1216 SetQueueSizes(pAC);
1217#else
1218
1219 DualNet = SK_FALSE;
1220 if (pAC->RlmtNets == 2) {
1221 DualNet = SK_TRUE;
1222 }
1223
1224 if (SkGeInitAssignRamToQueues(
1225 pAC,
1226 pAC->ActivePort,
1227 DualNet)) {
1228 BoardFreeMem(pAC);
1229 printk("SkGeInitAssignRamToQueues failed.\n");
1230 return(-EAGAIN);
1231 }
1232#endif
1233
1234
1235 ProductStr(pAC);
1236#ifdef SK98_INFO
1237 printk("%s: %s\n", dev->name, pAC->DeviceStr);
1238
1239
1240 printk(" PrefPort:%c RlmtMode:%s\n",
1241 'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
1242 (pAC->RlmtMode==0) ? "Check Link State" :
1243 ((pAC->RlmtMode==1) ? "Check Link State" :
1244 ((pAC->RlmtMode==3) ? "Check Local Port" :
1245 ((pAC->RlmtMode==7) ? "Check Segmentation" :
1246 ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
1247#endif
1248
1249 SkGeYellowLED(pAC, pAC->IoBase, 1);
1250
1251
1252
1253
1254 pAC->Next = SkGeRootDev;
1255 SkGeRootDev = dev;
1256
1257 return (0);
1258}
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275static SK_BOOL BoardAllocMem(
1276SK_AC *pAC)
1277{
1278caddr_t pDescrMem;
1279size_t AllocLength;
1280int i;
1281unsigned long BusAddr;
1282
1283
1284
1285
1286#if (BITS_PER_LONG == 32)
1287 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
1288#else
1289 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
1290 + RX_RING_SIZE + 8;
1291#endif
1292
1293 pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
1294 &pAC->pDescrMemDMA);
1295
1296 if (pDescrMem == NULL) {
1297 return (SK_FALSE);
1298 }
1299 pAC->pDescrMem = pDescrMem;
1300 BusAddr = (unsigned long) pAC->pDescrMemDMA;
1301
1302
1303
1304
1305 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1306 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
1307 ("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
1308 i, (unsigned long) pDescrMem,
1309 BusAddr));
1310 pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
1311 pAC->TxPort[i][0].VTxDescrRing = BusAddr;
1312 pDescrMem += TX_RING_SIZE;
1313 BusAddr += TX_RING_SIZE;
1314
1315 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
1316 ("RX%d: pDescrMem: %lX, PhysDescrMem: %lX\n",
1317 i, (unsigned long) pDescrMem,
1318 (unsigned long)BusAddr));
1319 pAC->RxPort[i].pRxDescrRing = pDescrMem;
1320 pAC->RxPort[i].VRxDescrRing = BusAddr;
1321 pDescrMem += RX_RING_SIZE;
1322 BusAddr += RX_RING_SIZE;
1323 }
1324
1325 return (SK_TRUE);
1326}
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339static void BoardFreeMem(
1340SK_AC *pAC)
1341{
1342size_t AllocLength;
1343
1344 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1345 ("BoardFreeMem\n"));
1346#if (BITS_PER_LONG == 32)
1347 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
1348#else
1349 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
1350 + RX_RING_SIZE + 8;
1351#endif
1352
1353 pci_free_consistent(pAC->PciDev, AllocLength,
1354 pAC->pDescrMem, pAC->pDescrMemDMA);
1355 pAC->pDescrMem = NULL;
1356}
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369static void BoardInitMem(
1370SK_AC *pAC)
1371{
1372int i;
1373int RxDescrSize;
1374int TxDescrSize;
1375
1376 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1377 ("BoardInitMem\n"));
1378
1379 RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
1380 pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
1381 TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
1382 pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
1383
1384 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1385 SetupRing(
1386 pAC,
1387 pAC->TxPort[i][0].pTxDescrRing,
1388 pAC->TxPort[i][0].VTxDescrRing,
1389 (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
1390 (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
1391 (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
1392 &pAC->TxPort[i][0].TxdRingFree,
1393 SK_TRUE);
1394 SetupRing(
1395 pAC,
1396 pAC->RxPort[i].pRxDescrRing,
1397 pAC->RxPort[i].VRxDescrRing,
1398 &pAC->RxPort[i].pRxdRingHead,
1399 &pAC->RxPort[i].pRxdRingTail,
1400 &pAC->RxPort[i].pRxdRingPrev,
1401 &pAC->RxPort[i].RxdRingFree,
1402 SK_FALSE);
1403 }
1404}
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418static void SetupRing(
1419SK_AC *pAC,
1420void *pMemArea,
1421uintptr_t VMemArea,
1422RXD **ppRingHead,
1423RXD **ppRingTail,
1424RXD **ppRingPrev,
1425int *pRingFree,
1426SK_BOOL IsTx)
1427{
1428int i;
1429int DescrSize;
1430int DescrNum;
1431RXD *pDescr;
1432RXD *pNextDescr;
1433RXD *pPrevDescr;
1434uintptr_t VNextDescr;
1435
1436 if (IsTx == SK_TRUE) {
1437 DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
1438 DESCR_ALIGN;
1439 DescrNum = TX_RING_SIZE / DescrSize;
1440 } else {
1441 DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
1442 DESCR_ALIGN;
1443 DescrNum = RX_RING_SIZE / DescrSize;
1444 }
1445
1446 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
1447 ("Descriptor size: %d Descriptor Number: %d\n",
1448 DescrSize,DescrNum));
1449
1450 pDescr = (RXD*) pMemArea;
1451 pPrevDescr = NULL;
1452 pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
1453 VNextDescr = VMemArea + DescrSize;
1454 for(i=0; i<DescrNum; i++) {
1455
1456 pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
1457 pDescr->pNextRxd = pNextDescr;
1458 pDescr->TcpSumStarts = pAC->CsOfs;
1459
1460
1461 pPrevDescr = pDescr;
1462 pDescr = pNextDescr;
1463 pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
1464 VNextDescr += DescrSize;
1465 }
1466 pPrevDescr->pNextRxd = (RXD*) pMemArea;
1467 pPrevDescr->VNextRxd = VMemArea;
1468 pDescr = (RXD*) pMemArea;
1469 *ppRingHead = (RXD*) pMemArea;
1470 *ppRingTail = *ppRingHead;
1471 *ppRingPrev = pPrevDescr;
1472 *pRingFree = DescrNum;
1473}
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488static void PortReInitBmu(
1489SK_AC *pAC,
1490int PortIndex)
1491{
1492 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1493 ("PortReInitBmu "));
1494
1495
1496 SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
1497 TX_Q_CUR_DESCR_LOW,
1498 (uint32_t)(((caddr_t)
1499 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
1500 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
1501 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
1502 0xFFFFFFFF));
1503 SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
1504 TX_Q_DESCR_HIGH,
1505 (uint32_t)(((caddr_t)
1506 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
1507 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
1508 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
1509 SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CUR_DESCR_LOW,
1510 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
1511 pAC->RxPort[PortIndex].pRxDescrRing +
1512 pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
1513 SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_DESCR_HIGH,
1514 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
1515 pAC->RxPort[PortIndex].pRxDescrRing +
1516 pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
1517}
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532#if 0
1533static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
1534#else
1535void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
1536#endif
1537{
1538struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
1539DEV_NET *pNet;
1540SK_AC *pAC;
1541SK_U32 IntSrc;
1542
1543 pNet = (DEV_NET*) dev->priv;
1544 pAC = pNet->pAC;
1545
1546
1547
1548
1549 SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
1550 if (IntSrc == 0) {
1551 return;
1552 }
1553
1554 while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
1555#if 0
1556 if (IntSrc & IRQ_SW) {
1557 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1558 SK_DBGCAT_DRV_INT_SRC,
1559 ("Software IRQ\n"));
1560 }
1561#endif
1562 if (IntSrc & IRQ_EOF_RX1) {
1563 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1564 SK_DBGCAT_DRV_INT_SRC,
1565 ("EOF RX1 IRQ\n"));
1566 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1567 SK_PNMI_CNT_RX_INTR(pAC, 0);
1568 }
1569 if (IntSrc & IRQ_EOF_RX2) {
1570 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1571 SK_DBGCAT_DRV_INT_SRC,
1572 ("EOF RX2 IRQ\n"));
1573 ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
1574 SK_PNMI_CNT_RX_INTR(pAC, 1);
1575 }
1576#ifdef USE_TX_COMPLETE
1577 if (IntSrc & IRQ_EOF_AS_TX1) {
1578 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1579 SK_DBGCAT_DRV_INT_SRC,
1580 ("EOF AS TX1 IRQ\n"));
1581 SK_PNMI_CNT_TX_INTR(pAC, 0);
1582 spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1583 FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
1584 spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1585 }
1586 if (IntSrc & IRQ_EOF_AS_TX2) {
1587 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1588 SK_DBGCAT_DRV_INT_SRC,
1589 ("EOF AS TX2 IRQ\n"));
1590 SK_PNMI_CNT_TX_INTR(pAC, 1);
1591 spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
1592 FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
1593 spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
1594 }
1595#if 0
1596 if (IntSrc & IRQ_EOF_SY_TX1) {
1597 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1598 SK_DBGCAT_DRV_INT_SRC,
1599 ("EOF SY TX1 IRQ\n"));
1600 SK_PNMI_CNT_TX_INTR(pAC, 1);
1601 spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1602 FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
1603 spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1604 ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
1605 }
1606 if (IntSrc & IRQ_EOF_SY_TX2) {
1607 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1608 SK_DBGCAT_DRV_INT_SRC,
1609 ("EOF SY TX2 IRQ\n"));
1610 SK_PNMI_CNT_TX_INTR(pAC, 1);
1611 spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
1612 FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
1613 spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
1614 ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
1615 }
1616#endif
1617#endif
1618
1619
1620 if (IntSrc & IRQ_EOF_RX1)
1621 ClearAndStartRx(pAC, 0);
1622 if (IntSrc & IRQ_EOF_RX2)
1623 ClearAndStartRx(pAC, 1);
1624#ifdef USE_TX_COMPLETE
1625 if (IntSrc & IRQ_EOF_AS_TX1)
1626 ClearTxIrq(pAC, 0, TX_PRIO_LOW);
1627 if (IntSrc & IRQ_EOF_AS_TX2)
1628 ClearTxIrq(pAC, 1, TX_PRIO_LOW);
1629#endif
1630 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
1631 }
1632
1633 if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
1634 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
1635 ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
1636 pAC->CheckQueue = SK_FALSE;
1637 spin_lock(&pAC->SlowPathLock);
1638 if (IntSrc & SPECIAL_IRQS)
1639 SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1640
1641 SkEventDispatcher(pAC, pAC->IoBase);
1642 spin_unlock(&pAC->SlowPathLock);
1643 }
1644
1645
1646
1647
1648
1649
1650 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1651 ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
1652
1653 if (pAC->CheckQueue) {
1654 pAC->CheckQueue = SK_FALSE;
1655 spin_lock(&pAC->SlowPathLock);
1656 SkEventDispatcher(pAC, pAC->IoBase);
1657 spin_unlock(&pAC->SlowPathLock);
1658 }
1659
1660
1661
1662 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
1663
1664 return;
1665}
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681#if 0
1682static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
1683#else
1684void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
1685#endif
1686{
1687struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
1688DEV_NET *pNet;
1689SK_AC *pAC;
1690SK_U32 IntSrc;
1691
1692 pNet = (DEV_NET*) dev->priv;
1693 pAC = pNet->pAC;
1694
1695
1696
1697
1698 SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
1699 if (IntSrc == 0) {
1700 return;
1701 }
1702
1703 while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
1704#if 0
1705 if (IntSrc & IRQ_SW) {
1706 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1707 SK_DBGCAT_DRV_INT_SRC,
1708 ("Software IRQ\n"));
1709 }
1710#endif
1711 if (IntSrc & IRQ_EOF_RX1) {
1712 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1713 SK_DBGCAT_DRV_INT_SRC,
1714 ("EOF RX1 IRQ\n"));
1715 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1716 SK_PNMI_CNT_RX_INTR(pAC, 0);
1717 }
1718#ifdef USE_TX_COMPLETE
1719 if (IntSrc & IRQ_EOF_AS_TX1) {
1720 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1721 SK_DBGCAT_DRV_INT_SRC,
1722 ("EOF AS TX1 IRQ\n"));
1723 SK_PNMI_CNT_TX_INTR(pAC, 0);
1724 spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1725 FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
1726 spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1727 }
1728#if 0
1729 if (IntSrc & IRQ_EOF_SY_TX1) {
1730 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1731 SK_DBGCAT_DRV_INT_SRC,
1732 ("EOF SY TX1 IRQ\n"));
1733 SK_PNMI_CNT_TX_INTR(pAC, 0);
1734 spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1735 FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
1736 spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1737 ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
1738 }
1739#endif
1740#endif
1741
1742
1743 if (IntSrc & IRQ_EOF_RX1)
1744 ClearAndStartRx(pAC, 0);
1745#ifdef USE_TX_COMPLETE
1746 if (IntSrc & IRQ_EOF_AS_TX1)
1747 ClearTxIrq(pAC, 0, TX_PRIO_LOW);
1748#endif
1749 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
1750 }
1751
1752 if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
1753 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
1754 ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
1755 pAC->CheckQueue = SK_FALSE;
1756 spin_lock(&pAC->SlowPathLock);
1757 if (IntSrc & SPECIAL_IRQS)
1758 SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1759
1760 SkEventDispatcher(pAC, pAC->IoBase);
1761 spin_unlock(&pAC->SlowPathLock);
1762 }
1763
1764
1765
1766
1767
1768 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1769
1770
1771 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
1772
1773 return;
1774}
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793#if 0
1794static int SkGeOpen(
1795#else
1796int SkGeOpen(
1797#endif
1798struct SK_NET_DEVICE *dev)
1799{
1800 DEV_NET *pNet;
1801 SK_AC *pAC;
1802 unsigned long Flags;
1803 int i;
1804 SK_EVPARA EvPara;
1805
1806 pNet = (DEV_NET*) dev->priv;
1807 pAC = pNet->pAC;
1808
1809 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1810 ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
1811
1812 if (pAC->BoardLevel == 0) {
1813
1814 if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
1815 printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
1816 return (-1);
1817 }
1818 SkI2cInit (pAC, pAC->IoBase, 1);
1819 SkEventInit (pAC, pAC->IoBase, 1);
1820 SkPnmiInit (pAC, pAC->IoBase, 1);
1821 SkAddrInit (pAC, pAC->IoBase, 1);
1822 SkRlmtInit (pAC, pAC->IoBase, 1);
1823 SkTimerInit (pAC, pAC->IoBase, 1);
1824 pAC->BoardLevel = 1;
1825 }
1826
1827 if (pAC->BoardLevel != 2) {
1828
1829 if (SkGeInit(pAC, pAC->IoBase, 2) != 0) {
1830 printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
1831 return (-1);
1832 }
1833 SkI2cInit (pAC, pAC->IoBase, 2);
1834 SkEventInit (pAC, pAC->IoBase, 2);
1835 SkPnmiInit (pAC, pAC->IoBase, 2);
1836 SkAddrInit (pAC, pAC->IoBase, 2);
1837 SkRlmtInit (pAC, pAC->IoBase, 2);
1838 SkTimerInit (pAC, pAC->IoBase, 2);
1839 pAC->BoardLevel = 2;
1840 }
1841
1842 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1843
1844 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
1845 FillRxRing(pAC, &pAC->RxPort[i]);
1846 }
1847 SkGeYellowLED(pAC, pAC->IoBase, 1);
1848
1849#ifdef USE_INT_MOD
1850
1851#define IRQ_MOD_MASK (IRQ_EOF_AS_TX1 | IRQ_EOF_AS_TX2)
1852 {
1853 unsigned long ModBase;
1854 ModBase = 53125000 / INTS_PER_SEC;
1855 SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
1856 SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
1857 SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
1858 }
1859#endif
1860
1861
1862 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
1863 SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
1864
1865 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1866
1867 if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
1868 EvPara.Para32[0] = pAC->RlmtNets;
1869 EvPara.Para32[1] = -1;
1870 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
1871 EvPara);
1872 EvPara.Para32[0] = pAC->RlmtMode;
1873 EvPara.Para32[1] = 0;
1874 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
1875 EvPara);
1876 }
1877
1878 EvPara.Para32[0] = pNet->NetNr;
1879 EvPara.Para32[1] = -1;
1880 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
1881 SkEventDispatcher(pAC, pAC->IoBase);
1882 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1883
1884 pAC->MaxPorts++;
1885 pNet->Up = 1;
1886
1887 MOD_INC_USE_COUNT;
1888
1889 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1890 ("SkGeOpen suceeded\n"));
1891
1892 return (0);
1893}
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907#if 0
1908static int SkGeClose(
1909#else
1910int SkGeClose(
1911#endif
1912struct SK_NET_DEVICE *dev)
1913{
1914 DEV_NET *pNet;
1915 SK_AC *pAC;
1916
1917 unsigned long Flags;
1918 int i;
1919 int PortIdx;
1920 SK_EVPARA EvPara;
1921
1922 netif_stop_queue(dev);
1923 pNet = (DEV_NET*) dev->priv;
1924 pAC = pNet->pAC;
1925
1926 if (pAC->RlmtNets == 1)
1927 PortIdx = pAC->ActivePort;
1928 else
1929 PortIdx = pNet->NetNr;
1930
1931 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1932 ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
1933
1934
1935
1936
1937 SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
1938 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
1939 SK_PROM_MODE_NONE);
1940
1941 if (pAC->MaxPorts == 1) {
1942 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1943
1944 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1945 EvPara.Para32[0] = pNet->NetNr;
1946 EvPara.Para32[1] = -1;
1947 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1948 SkEventDispatcher(pAC, pAC->IoBase);
1949 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1950
1951 SkGeDeInit(pAC, pAC->IoBase);
1952 pAC->BoardLevel = 0;
1953 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1954 } else {
1955
1956 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1957 EvPara.Para32[0] = pNet->NetNr;
1958 EvPara.Para32[1] = -1;
1959 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1960 SkEventDispatcher(pAC, pAC->IoBase);
1961 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1962
1963
1964 spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
1965 [TX_PRIO_LOW].TxDesRingLock, Flags);
1966 SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
1967 SK_STOP_ALL, SK_HARD_RST);
1968 spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
1969 [TX_PRIO_LOW].TxDesRingLock, Flags);
1970 }
1971
1972 if (pAC->RlmtNets == 1) {
1973
1974 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1975 ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
1976 ClearRxRing(pAC, &pAC->RxPort[i]);
1977 ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
1978 }
1979 } else {
1980
1981 ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
1982 ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
1983 ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
1984 }
1985
1986 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1987 ("SkGeClose: done "));
1988
1989 pAC->MaxPorts--;
1990 pNet->Up = 0;
1991 MOD_DEC_USE_COUNT;
1992
1993 return (0);
1994}
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012#if 0
2013static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
2014#else
2015int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
2016#endif
2017{
2018DEV_NET *pNet;
2019SK_AC *pAC;
2020int Rc;
2021
2022 pNet = (DEV_NET*) dev->priv;
2023 pAC = pNet->pAC;
2024
2025#if 0
2026 if ((!skb_shinfo(skb)->nr_frags) ||
2027#else
2028 if (1 ||
2029#endif
2030 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
2031
2032
2033 if (pAC->RlmtNets == 2)
2034 Rc = XmitFrame(
2035 pAC,
2036 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
2037 skb);
2038 else
2039 Rc = XmitFrame(
2040 pAC,
2041 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
2042 skb);
2043 } else {
2044#if 0
2045
2046 if (pAC->RlmtNets == 2)
2047 Rc = XmitFrameSG(
2048 pAC,
2049 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
2050 skb);
2051 else
2052 Rc = XmitFrameSG(
2053 pAC,
2054 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
2055 skb);
2056#endif
2057 }
2058
2059
2060 if (Rc <= 0) {
2061 netif_stop_queue(dev);
2062 }
2063
2064
2065
2066
2067 if (Rc < 0)
2068 return (1);
2069
2070#if 0
2071 dev->trans_start = jiffies;
2072#endif
2073 return (0);
2074}
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099static int XmitFrame(
2100SK_AC *pAC,
2101TX_PORT *pTxPort,
2102struct sk_buff *pMessage)
2103{
2104TXD *pTxd;
2105unsigned long Flags;
2106SK_U64 PhysAddr;
2107int BytesSend;
2108
2109 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
2110 ("X"));
2111
2112 spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
2113#ifndef USE_TX_COMPLETE
2114 FreeTxDescriptors(pAC, pTxPort);
2115#endif
2116 if (pTxPort->TxdRingFree == 0) {
2117
2118 FreeTxDescriptors(pAC, pTxPort);
2119 if (pTxPort->TxdRingFree == 0) {
2120 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2121 SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
2122 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2123 SK_DBGCAT_DRV_TX_PROGRESS,
2124 ("XmitFrame failed\n"));
2125
2126
2127
2128 return (-1);
2129 }
2130 }
2131
2132 pTxd = pTxPort->pTxdRingHead;
2133 pTxPort->pTxdRingHead = pTxd->pNextTxd;
2134 pTxPort->TxdRingFree--;
2135
2136
2137
2138
2139
2140
2141#ifdef SK_DUMP_TX
2142 DumpMsg(pMessage, "XmitFrame");
2143#endif
2144
2145
2146#if 0
2147 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2148 virt_to_page(pMessage->data),
2149 ((unsigned long) pMessage->data &
2150 ~PAGE_MASK),
2151 pMessage->len,
2152 PCI_DMA_TODEVICE);
2153#else
2154 PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32) pMessage->data);
2155#endif
2156 pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2157 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2158 pTxd->pMBuf = pMessage;
2159 pTxd->TBControl = TX_CTRL_OWN_BMU | TX_CTRL_STF |
2160 TX_CTRL_CHECK_DEFAULT | TX_CTRL_SOFTWARE |
2161#ifdef USE_TX_COMPLETE
2162 TX_CTRL_EOF | TX_CTRL_EOF_IRQ | pMessage->len;
2163#else
2164 TX_CTRL_EOF | pMessage->len;
2165#endif
2166
2167 if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
2168
2169
2170 SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
2171 }
2172 pTxPort->pTxdRingPrev = pTxd;
2173
2174
2175 BytesSend = pMessage->len;
2176 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2177
2178 if (pTxPort->TxdRingFree != 0)
2179 return (BytesSend);
2180 else
2181 return (0);
2182
2183}
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200#if 0
2201static int XmitFrameSG(
2202SK_AC *pAC,
2203TX_PORT *pTxPort,
2204struct sk_buff *pMessage)
2205{
2206
2207 int i;
2208 int BytesSend;
2209 int hlength;
2210 int protocol;
2211 skb_frag_t *sk_frag;
2212 TXD *pTxd;
2213 TXD *pTxdFst;
2214 TXD *pTxdLst;
2215 SK_U64 PhysAddr;
2216 unsigned long Flags;
2217
2218 spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
2219#ifndef USE_TX_COMPLETE
2220 FreeTxDescriptors(pAC, pTxPort);
2221#endif
2222 if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
2223 FreeTxDescriptors(pAC, pTxPort);
2224 if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
2225 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2226 SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
2227 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2228 SK_DBGCAT_DRV_TX_PROGRESS,
2229 ("XmitFrameSG failed - Ring full\n"));
2230
2231 return(-1);
2232 }
2233 }
2234
2235
2236 pTxd = pTxPort->pTxdRingHead;
2237 pTxdFst = pTxd;
2238 pTxdLst = pTxd;
2239 BytesSend = 0;
2240 protocol = 0;
2241
2242
2243 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2244 virt_to_page(pMessage->data),
2245 ((unsigned long) pMessage->data & ~PAGE_MASK),
2246 skb_headlen(pMessage),
2247 PCI_DMA_TODEVICE);
2248
2249 pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2250 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2251
2252
2253 if (pMessage->ip_summed == CHECKSUM_HW) {
2254 pTxd->TBControl = TX_CTRL_STF |
2255 TX_CTRL_ST_FWD |
2256 skb_headlen(pMessage);
2257
2258
2259
2260 protocol = ((SK_U8)pMessage->data[23] & 0xf);
2261 if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
2262 pTxd->TBControl |= BMU_UDP_CHECK;
2263 else
2264 pTxd->TBControl |= BMU_TCP_CHECK ;
2265
2266 hlength = ((SK_U8)pMessage->data[14] & 0xf) * 4;
2267 pTxd->TcpSumOfs = 0;
2268 pTxd->TcpSumSt = 14+hlength+16;
2269 pTxd->TcpSumWr = 14+hlength;
2270
2271 } else {
2272 pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
2273 TX_CTRL_SOFTWARE |
2274 TX_CTRL_STF |
2275 skb_headlen(pMessage);
2276 }
2277
2278 pTxd = pTxd->pNextTxd;
2279 pTxPort->TxdRingFree--;
2280 BytesSend += skb_headlen(pMessage);
2281
2282
2283
2284 for (i = 0; i < skb_shinfo(pMessage)->nr_frags; i++) {
2285 sk_frag = &skb_shinfo(pMessage)->frags[i];
2286
2287
2288 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2289 sk_frag->page,
2290 sk_frag->page_offset,
2291 sk_frag->size,
2292 PCI_DMA_TODEVICE);
2293
2294 pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2295 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2296 pTxd->pMBuf = pMessage;
2297
2298
2299 if (pMessage->ip_summed == CHECKSUM_HW) {
2300 pTxd->TBControl = TX_CTRL_OWN_BMU |
2301 TX_CTRL_SOFTWARE |
2302 TX_CTRL_ST_FWD;
2303
2304
2305
2306 if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
2307 pTxd->TBControl |= BMU_UDP_CHECK ;
2308 else
2309 pTxd->TBControl |= BMU_TCP_CHECK ;
2310
2311 } else {
2312 pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
2313 TX_CTRL_SOFTWARE |
2314 TX_CTRL_OWN_BMU;
2315 }
2316
2317
2318 if( (i+1) == skb_shinfo(pMessage)->nr_frags ) {
2319#ifdef USE_TX_COMPLETE
2320 pTxd->TBControl |= TX_CTRL_EOF |
2321 TX_CTRL_EOF_IRQ |
2322 sk_frag->size;
2323#else
2324 pTxd->TBControl |= TX_CTRL_EOF |
2325 sk_frag->size;
2326#endif
2327 pTxdFst->TBControl |= TX_CTRL_OWN_BMU |
2328 TX_CTRL_SOFTWARE;
2329
2330 } else {
2331 pTxd->TBControl |= sk_frag->size;
2332 }
2333 pTxdLst = pTxd;
2334 pTxd = pTxd->pNextTxd;
2335 pTxPort->TxdRingFree--;
2336 BytesSend += sk_frag->size;
2337 }
2338
2339 if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
2340
2341
2342 SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
2343 }
2344
2345 pTxPort->pTxdRingPrev = pTxdLst;
2346 pTxPort->pTxdRingHead = pTxd;
2347
2348 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2349
2350 if (pTxPort->TxdRingFree > 0)
2351 return (BytesSend);
2352 else
2353 return (0);
2354}
2355#endif
2356
2357
2358void dump_frag( SK_U8 *data, int length)
2359{
2360 int i;
2361
2362 printk("Length: %d\n", length);
2363 for( i=0; i < length; i++ ) {
2364 printk(" %02x", (SK_U8)*(data + i) );
2365 if( !((i+1) % 20) )
2366 printk("\n");
2367 }
2368 printk("\n\n");
2369
2370}
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391static void FreeTxDescriptors(
2392SK_AC *pAC,
2393TX_PORT *pTxPort)
2394{
2395TXD *pTxd;
2396TXD *pNewTail;
2397SK_U32 Control;
2398SK_U64 PhysAddr;
2399
2400 pNewTail = pTxPort->pTxdRingTail;
2401 pTxd = pNewTail;
2402
2403
2404
2405
2406 while (1) {
2407 Control = pTxd->TBControl;
2408 if ((Control & TX_CTRL_SOFTWARE) == 0) {
2409
2410
2411
2412
2413
2414
2415 pTxPort->pTxdRingTail = pTxd;
2416 netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
2417 return;
2418 }
2419 if (Control & TX_CTRL_OWN_BMU) {
2420 pTxPort->pTxdRingTail = pTxd;
2421 if (pTxPort->TxdRingFree > 0) {
2422 netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
2423 }
2424 return;
2425 }
2426
2427
2428 PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
2429 PhysAddr |= (SK_U64) pTxd->VDataLow;
2430 pci_unmap_page(pAC->PciDev, PhysAddr,
2431 pTxd->pMBuf->len,
2432 PCI_DMA_TODEVICE);
2433
2434 if (Control & TX_CTRL_EOF)
2435 DEV_KFREE_SKB_ANY(pTxd->pMBuf);
2436
2437 pTxPort->TxdRingFree++;
2438 pTxd->TBControl &= ~TX_CTRL_SOFTWARE;
2439 pTxd = pTxd->pNextTxd;
2440 }
2441}
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459static void FillRxRing(
2460SK_AC *pAC,
2461RX_PORT *pRxPort)
2462
2463{
2464unsigned long Flags;
2465
2466 spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
2467 while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
2468 if(!FillRxDescriptor(pAC, pRxPort))
2469 break;
2470 }
2471 spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
2472}
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487static SK_BOOL FillRxDescriptor(
2488SK_AC *pAC,
2489RX_PORT *pRxPort)
2490{
2491struct sk_buff *pMsgBlock;
2492RXD *pRxd;
2493SK_U16 Length;
2494SK_U64 PhysAddr;
2495
2496 pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
2497 if (pMsgBlock == NULL) {
2498 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2499 SK_DBGCAT_DRV_ENTRY,
2500 ("%s: Allocation of rx buffer failed !\n",
2501 pAC->dev[pRxPort->PortIndex]->name));
2502 SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
2503 return(SK_FALSE);
2504 }
2505 skb_reserve(pMsgBlock, 2);
2506
2507 pRxd = pRxPort->pRxdRingTail;
2508 pRxPort->pRxdRingTail = pRxd->pNextRxd;
2509 pRxPort->RxdRingFree--;
2510 Length = pAC->RxBufSize;
2511#if 0
2512 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2513 virt_to_page(pMsgBlock->data),
2514 ((unsigned long) pMsgBlock->data &
2515 ~PAGE_MASK),
2516 pAC->RxBufSize - 2,
2517 PCI_DMA_FROMDEVICE);
2518#else
2519 PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32)pMsgBlock->data);
2520#endif
2521 pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2522 pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2523 pRxd->pMBuf = pMsgBlock;
2524 pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
2525 RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
2526 return (SK_TRUE);
2527
2528}
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542static void ReQueueRxBuffer(
2543SK_AC *pAC,
2544RX_PORT *pRxPort,
2545struct sk_buff *pMsg,
2546SK_U32 PhysHigh,
2547SK_U32 PhysLow)
2548{
2549RXD *pRxd;
2550SK_U16 Length;
2551
2552 pRxd = pRxPort->pRxdRingTail;
2553 pRxPort->pRxdRingTail = pRxd->pNextRxd;
2554 pRxPort->RxdRingFree--;
2555 Length = pAC->RxBufSize;
2556 pRxd->VDataLow = PhysLow;
2557 pRxd->VDataHigh = PhysHigh;
2558 pRxd->pMBuf = pMsg;
2559 pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
2560 RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
2561 return;
2562}
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576#if 0
2577static void ReceiveIrq(
2578#else
2579void ReceiveIrq(
2580#endif
2581 SK_AC *pAC,
2582 RX_PORT *pRxPort,
2583 SK_BOOL SlowPathLock)
2584{
2585RXD *pRxd;
2586SK_U32 Control;
2587struct sk_buff *pMsg;
2588struct sk_buff *pNewMsg;
2589int FrameLength;
2590SK_MBUF *pRlmtMbuf;
2591SK_EVPARA EvPara;
2592unsigned long Flags;
2593int PortIndex = pRxPort->PortIndex;
2594unsigned int Offset;
2595unsigned int NumBytes;
2596unsigned int ForRlmt;
2597SK_BOOL IsBc;
2598SK_BOOL IsMc;
2599SK_BOOL IsBadFrame;
2600
2601SK_U32 FrameStat;
2602unsigned short Csum1;
2603unsigned short Csum2;
2604unsigned short Type;
2605#if 0
2606int Result;
2607#endif
2608SK_U64 PhysAddr;
2609
2610rx_start:
2611
2612 for ( pRxd = pRxPort->pRxdRingHead ;
2613 pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
2614 pRxd = pRxd->pNextRxd,
2615 pRxPort->pRxdRingHead = pRxd,
2616 pRxPort->RxdRingFree ++) {
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628 Control = pRxd->RBControl;
2629
2630
2631 if ((Control & RX_CTRL_OWN_BMU) != 0) {
2632
2633
2634
2635 FillRxRing(pAC, pRxPort);
2636 return;
2637 }
2638
2639
2640 FrameLength = Control & RX_CTRL_LEN_MASK;
2641 if (FrameLength > pAC->RxBufSize) {
2642 goto rx_failed;
2643 }
2644
2645
2646 if ((Control & (RX_CTRL_STF | RX_CTRL_EOF)) !=
2647 (RX_CTRL_STF | RX_CTRL_EOF)) {
2648 goto rx_failed;
2649 }
2650
2651
2652 pMsg = pRxd->pMBuf;
2653
2654 FrameStat = pRxd->FrameStat;
2655
2656
2657#define XMR_FS_LEN_SHIFT 18
2658#define GMR_FS_LEN_SHIFT 16
2659 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2660 if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
2661 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2662 SK_DBGCAT_DRV_RX_PROGRESS,
2663 ("skge: Frame length mismatch (%u/%u).\n",
2664 FrameLength,
2665 (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2666 goto rx_failed;
2667 }
2668 }
2669 else {
2670 if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
2671 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2672 SK_DBGCAT_DRV_RX_PROGRESS,
2673 ("skge: Frame length mismatch (%u/%u).\n",
2674 FrameLength,
2675 (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2676 goto rx_failed;
2677 }
2678 }
2679
2680
2681 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2682 IsBc = (FrameStat & XMR_FS_BC) != 0;
2683 IsMc = (FrameStat & XMR_FS_MC) != 0;
2684 IsBadFrame = (FrameStat &
2685 (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
2686 } else {
2687 IsBc = (FrameStat & GMR_FS_BC) != 0;
2688 IsMc = (FrameStat & GMR_FS_MC) != 0;
2689 IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
2690 ((FrameStat & GMR_FS_RX_OK) == 0));
2691 }
2692
2693 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2694 ("Received frame of length %d on port %d\n",
2695 FrameLength, PortIndex));
2696 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2697 ("Number of free rx descriptors: %d\n",
2698 pRxPort->RxdRingFree));
2699
2700
2701 if ((Control & RX_CTRL_STAT_VALID) != RX_CTRL_STAT_VALID ||
2702 (IsBadFrame)) {
2703#if 0
2704 (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
2705#endif
2706
2707 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2708 SK_DBGCAT_DRV_RX_PROGRESS,
2709 ("skge: Error in received frame, dropped!\n"
2710 "Control: %x\nRxStat: %x\n",
2711 Control, FrameStat));
2712
2713 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2714 PhysAddr |= (SK_U64) pRxd->VDataLow;
2715 pci_dma_sync_single(pAC->PciDev,
2716 (dma_addr_t) PhysAddr,
2717 FrameLength,
2718 PCI_DMA_FROMDEVICE);
2719 ReQueueRxBuffer(pAC, pRxPort, pMsg,
2720 pRxd->VDataHigh, pRxd->VDataLow);
2721
2722 continue;
2723 }
2724
2725
2726
2727
2728 if ((FrameLength < SK_COPY_THRESHOLD) &&
2729 ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
2730
2731
2732
2733
2734 skb_reserve(pNewMsg, 2);
2735 skb_put(pNewMsg, FrameLength);
2736 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2737 PhysAddr |= (SK_U64) pRxd->VDataLow;
2738
2739 pci_dma_sync_single(pAC->PciDev,
2740 (dma_addr_t) PhysAddr,
2741 FrameLength,
2742 PCI_DMA_FROMDEVICE);
2743 eth_copy_and_sum(pNewMsg, pMsg->data,
2744 FrameLength, 0);
2745 ReQueueRxBuffer(pAC, pRxPort, pMsg,
2746 pRxd->VDataHigh, pRxd->VDataLow);
2747 pMsg = pNewMsg;
2748
2749 }
2750 else {
2751
2752
2753
2754
2755
2756 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2757 PhysAddr |= (SK_U64) pRxd->VDataLow;
2758
2759
2760 pci_unmap_single(pAC->PciDev,
2761 PhysAddr,
2762 pAC->RxBufSize - 2,
2763 PCI_DMA_FROMDEVICE);
2764
2765
2766 skb_put(pMsg, FrameLength);
2767
2768 Type = ntohs(*((short*)&pMsg->data[12]));
2769 if (Type == 0x800) {
2770 Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
2771 Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
2772#if 0
2773 if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
2774 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
2775 (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
2776 Result = SkCsGetReceiveInfo(pAC,
2777 &pMsg->data[14],
2778 Csum1, Csum2, pRxPort->PortIndex);
2779 if (Result ==
2780 SKCS_STATUS_IP_FRAGMENT ||
2781 Result ==
2782 SKCS_STATUS_IP_CSUM_OK ||
2783 Result ==
2784 SKCS_STATUS_TCP_CSUM_OK ||
2785 Result ==
2786 SKCS_STATUS_UDP_CSUM_OK) {
2787 pMsg->ip_summed =
2788 CHECKSUM_UNNECESSARY;
2789 } else {
2790 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2791 SK_DBGCAT_DRV_RX_PROGRESS,
2792 ("skge: CRC error. Frame dropped!\n"));
2793 goto rx_failed;
2794 }
2795 }
2796#endif
2797 }
2798 }
2799
2800 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
2801 ForRlmt = SK_RLMT_RX_PROTOCOL;
2802#if 0
2803 IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
2804#endif
2805 SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
2806 IsBc, &Offset, &NumBytes);
2807 if (NumBytes != 0) {
2808#if 0
2809 IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
2810#endif
2811 SK_RLMT_LOOKAHEAD(pAC, PortIndex,
2812 &pMsg->data[Offset],
2813 IsBc, IsMc, &ForRlmt);
2814 }
2815 if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
2816 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
2817
2818 if ((PortIndex == pAC->ActivePort) ||
2819 (pAC->RlmtNets == 2)) {
2820
2821 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
2822#ifdef xDEBUG
2823 DumpMsg(pMsg, "Rx");
2824#endif
2825 SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
2826 FrameLength, pRxPort->PortIndex);
2827
2828#if 0
2829 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2830 pMsg->protocol = eth_type_trans(pMsg,
2831 pAC->dev[pRxPort->PortIndex]);
2832 netif_rx(pMsg);
2833 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2834#else
2835 NetReceive(pMsg->data, pMsg->len);
2836 dev_kfree_skb_any(pMsg);
2837#endif
2838 }
2839 else {
2840
2841 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2842 SK_DBGCAT_DRV_RX_PROGRESS,
2843 ("D"));
2844 DEV_KFREE_SKB(pMsg);
2845 }
2846
2847 }
2848 else {
2849
2850 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2851 SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
2852 pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
2853 pAC->IoBase, FrameLength);
2854 if (pRlmtMbuf != NULL) {
2855 pRlmtMbuf->pNext = NULL;
2856 pRlmtMbuf->Length = FrameLength;
2857 pRlmtMbuf->PortIdx = PortIndex;
2858 EvPara.pParaPtr = pRlmtMbuf;
2859 memcpy((char*)(pRlmtMbuf->pData),
2860 (char*)(pMsg->data),
2861 FrameLength);
2862
2863
2864 if (SlowPathLock == SK_TRUE) {
2865 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2866 SkEventQueue(pAC, SKGE_RLMT,
2867 SK_RLMT_PACKET_RECEIVED,
2868 EvPara);
2869 pAC->CheckQueue = SK_TRUE;
2870 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2871 } else {
2872 SkEventQueue(pAC, SKGE_RLMT,
2873 SK_RLMT_PACKET_RECEIVED,
2874 EvPara);
2875 pAC->CheckQueue = SK_TRUE;
2876 }
2877
2878 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2879 SK_DBGCAT_DRV_RX_PROGRESS,
2880 ("Q"));
2881 }
2882#if 0
2883 if ((pAC->dev[pRxPort->PortIndex]->flags &
2884 (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
2885 (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
2886 SK_RLMT_RX_PROTOCOL) {
2887 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2888 pMsg->protocol = eth_type_trans(pMsg,
2889 pAC->dev[pRxPort->PortIndex]);
2890 netif_rx(pMsg);
2891 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2892 }
2893#else
2894 if (0) {
2895 }
2896#endif
2897 else {
2898 DEV_KFREE_SKB(pMsg);
2899 }
2900
2901 }
2902 }
2903
2904
2905 FillRxRing(pAC, pRxPort);
2906
2907 if (pAC->BoardLevel > 0) {
2908 ClearAndStartRx(pAC, PortIndex);
2909 }
2910 return;
2911
2912rx_failed:
2913
2914 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
2915 ("Schrottdescriptor, length: 0x%x\n", FrameLength));
2916
2917
2918
2919 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2920 PhysAddr |= (SK_U64) pRxd->VDataLow;
2921 pci_unmap_page(pAC->PciDev,
2922 PhysAddr,
2923 pAC->RxBufSize - 2,
2924 PCI_DMA_FROMDEVICE);
2925 DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
2926 pRxd->pMBuf = NULL;
2927 pRxPort->RxdRingFree++;
2928 pRxPort->pRxdRingHead = pRxd->pNextRxd;
2929 goto rx_start;
2930
2931}
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945static void ClearAndStartRx(
2946SK_AC *pAC,
2947int PortIndex)
2948{
2949 SK_OUT8(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CTRL,
2950 RX_Q_CTRL_START | RX_Q_CTRL_CLR_I_EOF);
2951}
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964static void ClearTxIrq(
2965SK_AC *pAC,
2966int PortIndex,
2967int Prio)
2968{
2969 SK_OUT8(pAC->IoBase, TxQueueAddr[PortIndex][Prio]+TX_Q_CTRL,
2970 TX_Q_CTRL_CLR_I_EOF);
2971}
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984static void ClearRxRing(
2985SK_AC *pAC,
2986RX_PORT *pRxPort)
2987{
2988RXD *pRxd;
2989unsigned long Flags;
2990SK_U64 PhysAddr;
2991
2992 if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
2993 return;
2994 }
2995 spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
2996 pRxd = pRxPort->pRxdRingHead;
2997 do {
2998 if (pRxd->pMBuf != NULL) {
2999
3000 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
3001 PhysAddr |= (SK_U64) pRxd->VDataLow;
3002 pci_unmap_page(pAC->PciDev,
3003 PhysAddr,
3004 pAC->RxBufSize - 2,
3005 PCI_DMA_FROMDEVICE);
3006 DEV_KFREE_SKB(pRxd->pMBuf);
3007 pRxd->pMBuf = NULL;
3008 }
3009 pRxd->RBControl &= RX_CTRL_OWN_BMU;
3010 pRxd = pRxd->pNextRxd;
3011 pRxPort->RxdRingFree++;
3012 } while (pRxd != pRxPort->pRxdRingTail);
3013 pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
3014 spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
3015}
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031static void ClearTxRing(
3032SK_AC *pAC,
3033TX_PORT *pTxPort)
3034{
3035TXD *pTxd;
3036int i;
3037unsigned long Flags;
3038
3039 spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
3040 pTxd = pTxPort->pTxdRingHead;
3041 for (i=0; i<pAC->TxDescrPerRing; i++) {
3042 pTxd->TBControl &= ~TX_CTRL_OWN_BMU;
3043 pTxd = pTxd->pNextTxd;
3044 }
3045 FreeTxDescriptors(pAC, pTxPort);
3046 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
3047}
3048
3049
3050#if 0
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067static void SetQueueSizes(
3068SK_AC *pAC)
3069{
3070int StandbyRam;
3071int RemainingRam;
3072int RxRam;
3073int i;
3074
3075if (pAC->RlmtNets == 1) {
3076 StandbyRam = SK_RLMT_STANDBY_QRXSIZE + SK_RLMT_STANDBY_QXASIZE +
3077 SK_RLMT_STANDBY_QXSSIZE;
3078 RemainingRam = pAC->GIni.GIRamSize -
3079 (pAC->GIni.GIMacsFound-1) * StandbyRam;
3080 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3081 pAC->GIni.GP[i].PRxQSize = SK_RLMT_STANDBY_QRXSIZE;
3082 pAC->GIni.GP[i].PXSQSize = SK_RLMT_STANDBY_QXSSIZE;
3083 pAC->GIni.GP[i].PXAQSize = SK_RLMT_STANDBY_QXASIZE;
3084 }
3085 RxRam = (RemainingRam * 8 / 10) & ~7;
3086 pAC->GIni.GP[pAC->ActivePort].PRxQSize = RxRam;
3087 pAC->GIni.GP[pAC->ActivePort].PXSQSize = 0;
3088 pAC->GIni.GP[pAC->ActivePort].PXAQSize =
3089 (RemainingRam - RxRam) & ~7;
3090 pAC->RxQueueSize = RxRam;
3091 pAC->TxSQueueSize = 0;
3092 pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
3093 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3094 ("queue sizes settings - rx:%d txA:%d txS:%d\n",
3095 pAC->RxQueueSize,pAC->TxAQueueSize, pAC->TxSQueueSize));
3096} else {
3097 RemainingRam = pAC->GIni.GIRamSize/pAC->GIni.GIMacsFound;
3098 RxRam = (RemainingRam * 8 / 10) & ~7;
3099 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3100 pAC->GIni.GP[i].PRxQSize = RxRam;
3101 pAC->GIni.GP[i].PXSQSize = 0;
3102 pAC->GIni.GP[i].PXAQSize = (RemainingRam - RxRam) & ~7;
3103 }
3104
3105 pAC->RxQueueSize = RxRam;
3106 pAC->TxSQueueSize = 0;
3107 pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
3108}
3109 for (i=0; i<SK_MAX_MACS; i++) {
3110 pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing;
3111 }
3112
3113 if (pAC->RlmtNets == 2) {
3114 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3115 pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
3116 }
3117 } else {
3118 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3119 pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
3120 }
3121
3122
3123
3124
3125
3126
3127
3128 pAC->RxPort[pAC->ActivePort].RxFillLimit = 1;
3129 }
3130
3131#ifdef DEBUG
3132 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3133 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
3134 ("i: %d, RxQSize: %d, PXSQsize: %d, PXAQSize: %d\n",
3135 i,
3136 pAC->GIni.GP[i].PRxQSize,
3137 pAC->GIni.GP[i].PXSQSize,
3138 pAC->GIni.GP[i].PXAQSize));
3139 }
3140#endif
3141}
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
3156{
3157
3158DEV_NET *pNet = (DEV_NET*) dev->priv;
3159SK_AC *pAC = pNet->pAC;
3160
3161struct sockaddr *addr = p;
3162unsigned long Flags;
3163
3164 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3165 ("SkGeSetMacAddr starts now...\n"));
3166 if(netif_running(dev))
3167 return -EBUSY;
3168
3169 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
3170
3171 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3172
3173 if (pAC->RlmtNets == 2)
3174 SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
3175 (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
3176 else
3177 SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
3178 (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
3179
3180
3181 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3182 return 0;
3183}
3184#endif
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201#if 0
3202static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
3203{
3204
3205DEV_NET *pNet;
3206SK_AC *pAC;
3207
3208struct dev_mc_list *pMcList;
3209int i;
3210int PortIdx;
3211unsigned long Flags;
3212
3213 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3214 ("SkGeSetRxMode starts now... "));
3215
3216 pNet = (DEV_NET*) dev->priv;
3217 pAC = pNet->pAC;
3218 if (pAC->RlmtNets == 1)
3219 PortIdx = pAC->ActivePort;
3220 else
3221 PortIdx = pNet->NetNr;
3222
3223 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3224 if (dev->flags & IFF_PROMISC) {
3225 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3226 ("PROMISCUOUS mode\n"));
3227 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
3228 SK_PROM_MODE_LLC);
3229 } else if (dev->flags & IFF_ALLMULTI) {
3230 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3231 ("ALLMULTI mode\n"));
3232 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
3233 SK_PROM_MODE_ALL_MC);
3234 } else {
3235 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
3236 SK_PROM_MODE_NONE);
3237 SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
3238
3239 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3240 ("Number of MC entries: %d ", dev->mc_count));
3241
3242 pMcList = dev->mc_list;
3243 for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
3244 SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
3245 (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
3246 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
3247 ("%02x:%02x:%02x:%02x:%02x:%02x\n",
3248 pMcList->dmi_addr[0],
3249 pMcList->dmi_addr[1],
3250 pMcList->dmi_addr[2],
3251 pMcList->dmi_addr[3],
3252 pMcList->dmi_addr[4],
3253 pMcList->dmi_addr[5]));
3254 }
3255 SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
3256 }
3257 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3258
3259 return;
3260}
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
3277{
3278DEV_NET *pNet;
3279DEV_NET *pOtherNet;
3280SK_AC *pAC;
3281unsigned long Flags;
3282int i;
3283SK_EVPARA EvPara;
3284
3285 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3286 ("SkGeChangeMtu starts now...\n"));
3287
3288 pNet = (DEV_NET*) dev->priv;
3289 pAC = pNet->pAC;
3290
3291 if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
3292 return -EINVAL;
3293 }
3294
3295 if(pAC->BoardLevel != 2) {
3296 return -EINVAL;
3297 }
3298
3299 pNet->Mtu = NewMtu;
3300 pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
3301 if ((pOtherNet->Mtu > 1500) && (NewMtu <= 1500) && (pOtherNet->Up==1)) {
3302 return(0);
3303 }
3304
3305 EvPara.Para32[0] = pNet->NetNr;
3306 EvPara.Para32[1] = -1;
3307
3308 pAC->RxBufSize = NewMtu + 32;
3309 dev->mtu = NewMtu;
3310
3311 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3312 ("New MTU: %d\n", NewMtu));
3313
3314
3315
3316
3317 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
3318 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3319
3320
3321 if ((pAC->GIni.GIMacsFound == 2 ) &&
3322 (pAC->RlmtNets == 2)) {
3323
3324 EvPara.Para32[0] = 0;
3325 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
3326 EvPara.Para32[0] = 1;
3327 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
3328 } else {
3329 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
3330 }
3331
3332 SkEventDispatcher(pAC, pAC->IoBase);
3333
3334 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3335 spin_lock_irqsave(
3336 &pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock, Flags);
3337 netif_stop_queue(pAC->dev[i]);
3338
3339 }
3340
3341
3342
3343
3344 if (NewMtu > 1500) {
3345
3346 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3347
3348 if ((pAC->GIni.GIMacsFound == 2 ) &&
3349 (pAC->RlmtNets == 2)) {
3350 pAC->RxPort[i].RxFillLimit =
3351 pAC->RxDescrPerRing - 100;
3352 } else {
3353 if (i == pAC->ActivePort)
3354 pAC->RxPort[i].RxFillLimit =
3355 pAC->RxDescrPerRing - 100;
3356 else
3357 pAC->RxPort[i].RxFillLimit =
3358 pAC->RxDescrPerRing - 10;
3359 }
3360 }
3361 }
3362 else {
3363
3364 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3365
3366 if ((pAC->GIni.GIMacsFound == 2 ) &&
3367 (pAC->RlmtNets == 2)) {
3368 pAC->RxPort[i].RxFillLimit = 1;
3369 } else {
3370 if (i == pAC->ActivePort)
3371 pAC->RxPort[i].RxFillLimit = 1;
3372 else
3373 pAC->RxPort[i].RxFillLimit =
3374 pAC->RxDescrPerRing - 100;
3375 }
3376 }
3377 }
3378
3379 SkGeDeInit(pAC, pAC->IoBase);
3380
3381
3382
3383
3384 if (NewMtu > 1500) {
3385
3386 pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
3387 }
3388 else {
3389 if ((pAC->GIni.GIMacsFound == 2 ) &&
3390 (pAC->RlmtNets == 2)) {
3391 pAC->GIni.GIPortUsage = SK_MUL_LINK;
3392 } else {
3393 pAC->GIni.GIPortUsage = SK_RED_LINK;
3394 }
3395 }
3396
3397 SkGeInit( pAC, pAC->IoBase, 1);
3398 SkI2cInit( pAC, pAC->IoBase, 1);
3399 SkEventInit(pAC, pAC->IoBase, 1);
3400 SkPnmiInit( pAC, pAC->IoBase, 1);
3401 SkAddrInit( pAC, pAC->IoBase, 1);
3402 SkRlmtInit( pAC, pAC->IoBase, 1);
3403 SkTimerInit(pAC, pAC->IoBase, 1);
3404
3405
3406
3407
3408
3409 GetConfiguration(pAC);
3410
3411 SkGeInit( pAC, pAC->IoBase, 2);
3412 SkI2cInit( pAC, pAC->IoBase, 2);
3413 SkEventInit(pAC, pAC->IoBase, 2);
3414 SkPnmiInit( pAC, pAC->IoBase, 2);
3415 SkAddrInit( pAC, pAC->IoBase, 2);
3416 SkRlmtInit( pAC, pAC->IoBase, 2);
3417 SkTimerInit(pAC, pAC->IoBase, 2);
3418
3419
3420
3421
3422 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3423 ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
3424 ClearRxRing(pAC, &pAC->RxPort[i]);
3425 FillRxRing(pAC, &pAC->RxPort[i]);
3426
3427
3428 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
3429 FillRxRing(pAC, &pAC->RxPort[i]);
3430 };
3431
3432 SkGeYellowLED(pAC, pAC->IoBase, 1);
3433
3434#ifdef USE_INT_MOD
3435 {
3436 unsigned long ModBase;
3437 ModBase = 53125000 / INTS_PER_SEC;
3438 SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
3439 SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
3440 SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
3441 }
3442#endif
3443
3444 netif_start_queue(pAC->dev[pNet->PortNr]);
3445 for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
3446 spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
3447 }
3448
3449
3450 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
3451 SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
3452
3453 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
3454 SkEventDispatcher(pAC, pAC->IoBase);
3455
3456
3457 if ((pAC->GIni.GIMacsFound == 2 ) &&
3458 (pAC->RlmtNets == 2)) {
3459
3460 EvPara.Para32[0] = pAC->RlmtNets;
3461 EvPara.Para32[1] = -1;
3462 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
3463 EvPara);
3464
3465
3466 EvPara.Para32[1] = -1;
3467 EvPara.Para32[0] = pNet->PortNr;
3468 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
3469
3470 if (pOtherNet->Up) {
3471 EvPara.Para32[0] = pOtherNet->PortNr;
3472 SkEventQueue(pAC, SKGE_RLMT,
3473 SK_RLMT_START, EvPara);
3474 }
3475 } else {
3476 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
3477 }
3478
3479 SkEventDispatcher(pAC, pAC->IoBase);
3480 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3481
3482 return 0;
3483}
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
3498{
3499DEV_NET *pNet = (DEV_NET*) dev->priv;
3500SK_AC *pAC = pNet->pAC;
3501SK_PNMI_STRUCT_DATA *pPnmiStruct;
3502SK_PNMI_STAT *pPnmiStat;
3503SK_PNMI_CONF *pPnmiConf;
3504unsigned int Size;
3505unsigned long Flags;
3506
3507 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3508 ("SkGeStats starts now...\n"));
3509 pPnmiStruct = &pAC->PnmiStruct;
3510 memset(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
3511 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3512 Size = SK_PNMI_STRUCT_SIZE;
3513 SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
3514 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3515 pPnmiStat = &pPnmiStruct->Stat[0];
3516 pPnmiConf = &pPnmiStruct->Conf[0];
3517
3518 pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
3519 pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
3520 pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
3521 pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
3522
3523 if (pNet->Mtu <= 1500) {
3524 pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
3525 } else {
3526 pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
3527 pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
3528 }
3529
3530
3531 if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
3532 pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
3533
3534 pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
3535 pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
3536 pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
3537 pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
3538 pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
3539
3540
3541 pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
3542 pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
3543 pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
3544 pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
3545 pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
3546 pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
3547
3548
3549 pAC->stats.tx_aborted_errors = (SK_U32) 0;
3550 pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
3551 pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
3552 pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
3553 pAC->stats.tx_window_errors = (SK_U32) 0;
3554
3555 return(&pAC->stats);
3556}
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
3573{
3574DEV_NET *pNet;
3575SK_AC *pAC;
3576
3577SK_GE_IOCTL Ioctl;
3578unsigned int Err = 0;
3579int Size;
3580
3581 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3582 ("SkGeIoctl starts now...\n"));
3583
3584 pNet = (DEV_NET*) dev->priv;
3585 pAC = pNet->pAC;
3586
3587 if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
3588 return -EFAULT;
3589 }
3590
3591 switch(cmd) {
3592 case SK_IOCTL_SETMIB:
3593 case SK_IOCTL_PRESETMIB:
3594 if (!capable(CAP_NET_ADMIN)) return -EPERM;
3595 case SK_IOCTL_GETMIB:
3596 if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
3597 Ioctl.Len<sizeof(pAC->PnmiStruct)?
3598 Ioctl.Len : sizeof(pAC->PnmiStruct))) {
3599 return -EFAULT;
3600 }
3601 Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
3602 if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
3603 Ioctl.Len<Size? Ioctl.Len : Size)) {
3604 return -EFAULT;
3605 }
3606 Ioctl.Len = Size;
3607 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
3608 return -EFAULT;
3609 }
3610 break;
3611 default:
3612 Err = -EOPNOTSUPP;
3613 }
3614 return(Err);
3615}
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635static int SkGeIocMib(
3636DEV_NET *pNet,
3637unsigned int Size,
3638int mode)
3639{
3640unsigned long Flags;
3641SK_AC *pAC;
3642
3643 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3644 ("SkGeIocMib starts now...\n"));
3645 pAC = pNet->pAC;
3646
3647 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3648 switch(mode) {
3649 case SK_IOCTL_GETMIB:
3650 SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3651 pNet->NetNr);
3652 break;
3653 case SK_IOCTL_PRESETMIB:
3654 SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3655 pNet->NetNr);
3656 break;
3657 case SK_IOCTL_SETMIB:
3658 SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3659 pNet->NetNr);
3660 break;
3661 default:
3662 break;
3663 }
3664 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3665 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3666 ("MIB data access succeeded\n"));
3667 return (Size);
3668}
3669#endif
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683static void GetConfiguration(
3684SK_AC *pAC)
3685{
3686SK_I32 Port;
3687int LinkSpeed;
3688int AutoNeg;
3689int DuplexCap;
3690int MSMode;
3691SK_BOOL AutoSet;
3692SK_BOOL DupSet;
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705int Capabilities[3][3] =
3706 { { -1, SK_LMODE_FULL, SK_LMODE_HALF},
3707 {SK_LMODE_AUTOBOTH, SK_LMODE_AUTOFULL, SK_LMODE_AUTOHALF},
3708 {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
3709#define DC_BOTH 0
3710#define DC_FULL 1
3711#define DC_HALF 2
3712#define AN_OFF 0
3713#define AN_ON 1
3714#define AN_SENS 2
3715
3716
3717
3718 LinkSpeed = SK_LSPEED_AUTO;
3719 if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3720 Speed_A[pAC->Index] != NULL) {
3721 if (strcmp(Speed_A[pAC->Index],"")==0) {
3722 LinkSpeed = SK_LSPEED_AUTO;
3723 }
3724 else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
3725 LinkSpeed = SK_LSPEED_AUTO;
3726 }
3727 else if (strcmp(Speed_A[pAC->Index],"10")==0) {
3728 LinkSpeed = SK_LSPEED_10MBPS;
3729 }
3730 else if (strcmp(Speed_A[pAC->Index],"100")==0) {
3731 LinkSpeed = SK_LSPEED_100MBPS;
3732 }
3733 else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
3734 LinkSpeed = SK_LSPEED_1000MBPS;
3735 }
3736 else printk("%s: Illegal value for Speed_A\n",
3737 pAC->dev[0]->name);
3738 }
3739
3740
3741
3742 if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
3743 (pAC->GIni.GICopperType != SK_TRUE)) &&
3744 ((LinkSpeed != SK_LSPEED_AUTO) &&
3745 (LinkSpeed != SK_LSPEED_1000MBPS))) {
3746 printk("%s: Illegal value for Speed_A. "
3747 "Not a copper card or GE V2 card\n Using "
3748 "speed 1000\n", pAC->dev[0]->name);
3749 LinkSpeed = SK_LSPEED_1000MBPS;
3750 }
3751 pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
3752
3753
3754 AutoNeg = AN_ON;
3755 AutoSet = SK_FALSE;
3756 if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3757 AutoNeg_A[pAC->Index] != NULL) {
3758 AutoSet = SK_TRUE;
3759 if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
3760 AutoSet = SK_FALSE;
3761 }
3762 else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
3763 AutoNeg = AN_ON;
3764 }
3765 else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
3766 AutoNeg = AN_OFF;
3767 }
3768 else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
3769 AutoNeg = AN_SENS;
3770 }
3771 else printk("%s: Illegal value for AutoNeg_A\n",
3772 pAC->dev[0]->name);
3773 }
3774
3775 DuplexCap = DC_BOTH;
3776 DupSet = SK_FALSE;
3777 if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3778 DupCap_A[pAC->Index] != NULL) {
3779 DupSet = SK_TRUE;
3780 if (strcmp(DupCap_A[pAC->Index],"")==0) {
3781 DupSet = SK_FALSE;
3782 }
3783 else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
3784 DuplexCap = DC_BOTH;
3785 }
3786 else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
3787 DuplexCap = DC_FULL;
3788 }
3789 else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
3790 DuplexCap = DC_HALF;
3791 }
3792 else printk("%s: Illegal value for DupCap_A\n",
3793 pAC->dev[0]->name);
3794 }
3795
3796
3797 if (AutoSet && AutoNeg==AN_SENS && DupSet) {
3798 printk("%s, Port A: DuplexCapabilities"
3799 " ignored using Sense mode\n", pAC->dev[0]->name);
3800 }
3801 if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
3802 printk("%s, Port A: Illegal combination"
3803 " of values AutoNeg. and DuplexCap.\n Using "
3804 "Full Duplex\n", pAC->dev[0]->name);
3805
3806 DuplexCap = DC_FULL;
3807 }
3808 if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
3809 DuplexCap = DC_FULL;
3810 }
3811
3812 if (!AutoSet && DupSet) {
3813 printk("%s, Port A: Duplex setting not"
3814 " possible in\n default AutoNegotiation mode"
3815 " (Sense).\n Using AutoNegotiation On\n",
3816 pAC->dev[0]->name);
3817 AutoNeg = AN_ON;
3818 }
3819
3820
3821 pAC->GIni.GP[0].PLinkModeConf =
3822 Capabilities[AutoNeg][DuplexCap];
3823
3824 pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
3825 if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3826 FlowCtrl_A[pAC->Index] != NULL) {
3827 if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
3828 }
3829 else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
3830 pAC->GIni.GP[0].PFlowCtrlMode =
3831 SK_FLOW_MODE_SYM_OR_REM;
3832 }
3833 else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
3834 pAC->GIni.GP[0].PFlowCtrlMode =
3835 SK_FLOW_MODE_SYMMETRIC;
3836 }
3837 else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
3838 pAC->GIni.GP[0].PFlowCtrlMode =
3839 SK_FLOW_MODE_LOC_SEND;
3840 }
3841 else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
3842 pAC->GIni.GP[0].PFlowCtrlMode =
3843 SK_FLOW_MODE_NONE;
3844 }
3845 else printk("Illegal value for FlowCtrl_A\n");
3846 }
3847 if (AutoNeg==AN_OFF && pAC->GIni.GP[0].PFlowCtrlMode!=
3848 SK_FLOW_MODE_NONE) {
3849 printk("%s, Port A: FlowControl"
3850 " impossible without AutoNegotiation,"
3851 " disabled\n", pAC->dev[0]->name);
3852 pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_NONE;
3853 }
3854
3855 MSMode = SK_MS_MODE_AUTO;
3856 if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3857 Role_A[pAC->Index] != NULL) {
3858 if (strcmp(Role_A[pAC->Index],"")==0) {
3859 }
3860 else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
3861 MSMode = SK_MS_MODE_AUTO;
3862 }
3863 else if (strcmp(Role_A[pAC->Index],"Master")==0) {
3864 MSMode = SK_MS_MODE_MASTER;
3865 }
3866 else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
3867 MSMode = SK_MS_MODE_SLAVE;
3868 }
3869 else printk("%s: Illegal value for Role_A\n",
3870 pAC->dev[0]->name);
3871 }
3872 pAC->GIni.GP[0].PMSMode = MSMode;
3873
3874
3875
3876
3877 LinkSpeed = SK_LSPEED_AUTO;
3878 if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3879 Speed_B[pAC->Index] != NULL) {
3880 if (strcmp(Speed_B[pAC->Index],"")==0) {
3881 LinkSpeed = SK_LSPEED_AUTO;
3882 }
3883 else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
3884 LinkSpeed = SK_LSPEED_AUTO;
3885 }
3886 else if (strcmp(Speed_B[pAC->Index],"10")==0) {
3887 LinkSpeed = SK_LSPEED_10MBPS;
3888 }
3889 else if (strcmp(Speed_B[pAC->Index],"100")==0) {
3890 LinkSpeed = SK_LSPEED_100MBPS;
3891 }
3892 else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
3893 LinkSpeed = SK_LSPEED_1000MBPS;
3894 }
3895 else printk("%s: Illegal value for Speed_B\n",
3896 pAC->dev[1]->name);
3897 }
3898
3899
3900
3901 if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
3902 (pAC->GIni.GICopperType != SK_TRUE)) &&
3903 ((LinkSpeed != SK_LSPEED_AUTO) &&
3904 (LinkSpeed != SK_LSPEED_1000MBPS))) {
3905 printk("%s: Illegal value for Speed_B. "
3906 "Not a copper card or GE V2 card\n Using "
3907 "speed 1000\n", pAC->dev[1]->name);
3908 LinkSpeed = SK_LSPEED_1000MBPS;
3909 }
3910 pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
3911
3912
3913 AutoNeg = AN_SENS;
3914 AutoSet = SK_FALSE;
3915 if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3916 AutoNeg_B[pAC->Index] != NULL) {
3917 AutoSet = SK_TRUE;
3918 if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
3919 AutoSet = SK_FALSE;
3920 }
3921 else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
3922 AutoNeg = AN_ON;
3923 }
3924 else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
3925 AutoNeg = AN_OFF;
3926 }
3927 else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
3928 AutoNeg = AN_SENS;
3929 }
3930 else printk("Illegal value for AutoNeg_B\n");
3931 }
3932
3933 DuplexCap = DC_BOTH;
3934 DupSet = SK_FALSE;
3935 if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3936 DupCap_B[pAC->Index] != NULL) {
3937 DupSet = SK_TRUE;
3938 if (strcmp(DupCap_B[pAC->Index],"")==0) {
3939 DupSet = SK_FALSE;
3940 }
3941 else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
3942 DuplexCap = DC_BOTH;
3943 }
3944 else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
3945 DuplexCap = DC_FULL;
3946 }
3947 else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
3948 DuplexCap = DC_HALF;
3949 }
3950 else printk("Illegal value for DupCap_B\n");
3951 }
3952
3953
3954 if (AutoSet && AutoNeg==AN_SENS && DupSet) {
3955 printk("%s, Port B: DuplexCapabilities"
3956 " ignored using Sense mode\n", pAC->dev[1]->name);
3957 }
3958 if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
3959 printk("%s, Port B: Illegal combination"
3960 " of values AutoNeg. and DuplexCap.\n Using "
3961 "Full Duplex\n", pAC->dev[1]->name);
3962
3963 DuplexCap = DC_FULL;
3964 }
3965 if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
3966 DuplexCap = DC_FULL;
3967 }
3968
3969 if (!AutoSet && DupSet) {
3970 printk("%s, Port B: Duplex setting not"
3971 " possible in\n default AutoNegotiation mode"
3972 " (Sense).\n Using AutoNegotiation On\n",
3973 pAC->dev[1]->name);
3974 AutoNeg = AN_ON;
3975 }
3976
3977
3978 pAC->GIni.GP[1].PLinkModeConf =
3979 Capabilities[AutoNeg][DuplexCap];
3980
3981 pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
3982 if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3983 FlowCtrl_B[pAC->Index] != NULL) {
3984 if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
3985 }
3986 else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
3987 pAC->GIni.GP[1].PFlowCtrlMode =
3988 SK_FLOW_MODE_SYM_OR_REM;
3989 }
3990 else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
3991 pAC->GIni.GP[1].PFlowCtrlMode =
3992 SK_FLOW_MODE_SYMMETRIC;
3993 }
3994 else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
3995 pAC->GIni.GP[1].PFlowCtrlMode =
3996 SK_FLOW_MODE_LOC_SEND;
3997 }
3998 else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
3999 pAC->GIni.GP[1].PFlowCtrlMode =
4000 SK_FLOW_MODE_NONE;
4001 }
4002 else printk("Illegal value for FlowCtrl_B\n");
4003 }
4004 if (AutoNeg==AN_OFF && pAC->GIni.GP[1].PFlowCtrlMode!=
4005 SK_FLOW_MODE_NONE) {
4006 printk("%s, Port B: FlowControl"
4007 " impossible without AutoNegotiation,"
4008 " disabled\n", pAC->dev[1]->name);
4009 pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_NONE;
4010 }
4011
4012 MSMode = SK_MS_MODE_AUTO;
4013 if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
4014 Role_B[pAC->Index] != NULL) {
4015 if (strcmp(Role_B[pAC->Index],"")==0) {
4016 }
4017 else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
4018 MSMode = SK_MS_MODE_AUTO;
4019 }
4020 else if (strcmp(Role_B[pAC->Index],"Master")==0) {
4021 MSMode = SK_MS_MODE_MASTER;
4022 }
4023 else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
4024 MSMode = SK_MS_MODE_SLAVE;
4025 }
4026 else printk("%s: Illegal value for Role_B\n",
4027 pAC->dev[1]->name);
4028 }
4029 pAC->GIni.GP[1].PMSMode = MSMode;
4030
4031
4032
4033 pAC->ActivePort = 0;
4034 if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
4035 PrefPort[pAC->Index] != NULL) {
4036 if (strcmp(PrefPort[pAC->Index],"") == 0) {
4037 pAC->ActivePort = 0;
4038 pAC->Rlmt.Net[0].Preference = -1;
4039 pAC->Rlmt.Net[0].PrefPort = 0;
4040 }
4041 else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
4042
4043
4044
4045
4046 Port = 0;
4047 pAC->Rlmt.Net[0].Preference = Port;
4048 pAC->Rlmt.Net[0].PrefPort = Port;
4049 }
4050 else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
4051
4052
4053
4054
4055 Port = 1;
4056 pAC->Rlmt.Net[0].Preference = Port;
4057 pAC->Rlmt.Net[0].PrefPort = Port;
4058 }
4059 else printk("%s: Illegal value for PrefPort\n",
4060 pAC->dev[0]->name);
4061 }
4062
4063 pAC->RlmtNets = 1;
4064
4065 if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
4066 RlmtMode[pAC->Index] != NULL) {
4067 if (strcmp(RlmtMode[pAC->Index], "") == 0) {
4068 pAC->RlmtMode = 0;
4069 }
4070 else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
4071 pAC->RlmtMode = SK_RLMT_CHECK_LINK;
4072 }
4073 else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
4074 pAC->RlmtMode = SK_RLMT_CHECK_LINK |
4075 SK_RLMT_CHECK_LOC_LINK;
4076 }
4077 else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
4078 pAC->RlmtMode = SK_RLMT_CHECK_LINK |
4079 SK_RLMT_CHECK_LOC_LINK |
4080 SK_RLMT_CHECK_SEG;
4081 }
4082 else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
4083 (pAC->GIni.GIMacsFound == 2)) {
4084 pAC->RlmtMode = SK_RLMT_CHECK_LINK;
4085 pAC->RlmtNets = 2;
4086 }
4087 else {
4088 printk("%s: Illegal value for"
4089 " RlmtMode, using default\n", pAC->dev[0]->name);
4090 pAC->RlmtMode = 0;
4091 }
4092 }
4093 else {
4094 pAC->RlmtMode = 0;
4095 }
4096}
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109static void ProductStr(
4110SK_AC *pAC
4111)
4112{
4113int StrLen = 80;
4114char Keyword[] = VPD_NAME;
4115int ReturnCode;
4116unsigned long Flags;
4117
4118 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
4119 ReturnCode = VpdRead(pAC, pAC->IoBase, Keyword, pAC->DeviceStr,
4120 &StrLen);
4121 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
4122 if (ReturnCode != 0) {
4123
4124 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
4125 ("Error reading VPD data: %d\n", ReturnCode));
4126 pAC->DeviceStr[0] = '\0';
4127 }
4128}
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150SK_MBUF *SkDrvAllocRlmtMbuf(
4151SK_AC *pAC,
4152SK_IOC IoC,
4153unsigned BufferSize)
4154{
4155SK_MBUF *pRlmtMbuf;
4156struct sk_buff *pMsgBlock;
4157
4158 pMsgBlock = alloc_skb(BufferSize + sizeof(SK_MBUF), GFP_ATOMIC);
4159 if (pMsgBlock == NULL) {
4160 return (NULL);
4161 }
4162 pRlmtMbuf = (SK_MBUF*) pMsgBlock->data;
4163 skb_reserve(pMsgBlock, sizeof(SK_MBUF));
4164 pRlmtMbuf->pNext = NULL;
4165 pRlmtMbuf->pOs = pMsgBlock;
4166 pRlmtMbuf->pData = pMsgBlock->data;
4167 pRlmtMbuf->Size = BufferSize;
4168 pRlmtMbuf->Length = 0;
4169 return (pRlmtMbuf);
4170
4171}
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187void SkDrvFreeRlmtMbuf(
4188SK_AC *pAC,
4189SK_IOC IoC,
4190SK_MBUF *pMbuf)
4191{
4192SK_MBUF *pFreeMbuf;
4193SK_MBUF *pNextMbuf;
4194
4195 pFreeMbuf = pMbuf;
4196 do {
4197 pNextMbuf = pFreeMbuf->pNext;
4198 DEV_KFREE_SKB_ANY(pFreeMbuf->pOs);
4199 pFreeMbuf = pNextMbuf;
4200 } while ( pFreeMbuf != NULL );
4201}
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216SK_U64 SkOsGetTime(SK_AC *pAC)
4217{
4218#if 0
4219 return jiffies;
4220#else
4221 return get_timer(0);
4222#endif
4223}
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238int SkPciReadCfgDWord(
4239SK_AC *pAC,
4240int PciAddr,
4241SK_U32 *pVal)
4242{
4243 pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
4244 return(0);
4245}
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260int SkPciReadCfgWord(
4261SK_AC *pAC,
4262int PciAddr,
4263SK_U16 *pVal)
4264{
4265 pci_read_config_word(pAC->PciDev, PciAddr, pVal);
4266 return(0);
4267}
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282int SkPciReadCfgByte(
4283SK_AC *pAC,
4284int PciAddr,
4285SK_U8 *pVal)
4286{
4287 pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
4288 return(0);
4289}
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304int SkPciWriteCfgDWord(
4305SK_AC *pAC,
4306int PciAddr,
4307SK_U32 Val)
4308{
4309 pci_write_config_dword(pAC->PciDev, PciAddr, Val);
4310 return(0);
4311}
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327int SkPciWriteCfgWord(
4328SK_AC *pAC,
4329int PciAddr,
4330SK_U16 Val)
4331{
4332 pci_write_config_word(pAC->PciDev, PciAddr, Val);
4333 return(0);
4334}
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350int SkPciWriteCfgByte(
4351SK_AC *pAC,
4352int PciAddr,
4353SK_U8 Val)
4354{
4355 pci_write_config_byte(pAC->PciDev, PciAddr, Val);
4356 return(0);
4357}
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375int SkDrvEvent(
4376SK_AC *pAC,
4377SK_IOC IoC,
4378SK_U32 Event,
4379SK_EVPARA Param)
4380{
4381SK_MBUF *pRlmtMbuf;
4382struct sk_buff *pMsg;
4383int FromPort;
4384int ToPort;
4385SK_EVPARA NewPara;
4386#if 0
4387int Stat;
4388#endif
4389unsigned long Flags;
4390SK_BOOL DualNet;
4391
4392 switch (Event) {
4393 case SK_DRV_ADAP_FAIL:
4394 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4395 ("ADAPTER FAIL EVENT\n"));
4396 printk("%s: Adapter failed.\n", pAC->dev[0]->name);
4397
4398 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
4399
4400 break;
4401 case SK_DRV_PORT_FAIL:
4402 FromPort = Param.Para32[0];
4403 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4404 ("PORT FAIL EVENT, Port: %d\n", FromPort));
4405 if (FromPort == 0) {
4406 printk("%s: Port A failed.\n", pAC->dev[0]->name);
4407 } else {
4408 printk("%s: Port B failed.\n", pAC->dev[1]->name);
4409 }
4410
4411 break;
4412 case SK_DRV_PORT_RESET:
4413
4414 FromPort = Param.Para32[0];
4415 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4416 ("PORT RESET EVENT, Port: %d ", FromPort));
4417 NewPara.Para64 = FromPort;
4418 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
4419 spin_lock_irqsave(
4420 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4421 Flags);
4422 SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
4423#if 0
4424 pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
4425#endif
4426 spin_unlock_irqrestore(
4427 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4428 Flags);
4429
4430
4431 ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
4432
4433 ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
4434 spin_lock_irqsave(
4435 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4436 Flags);
4437
4438
4439 if (SkGeInitPort(pAC, IoC, FromPort)) {
4440 if (FromPort == 0) {
4441 printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
4442 } else {
4443 printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
4444 }
4445 }
4446 SkAddrMcUpdate(pAC,IoC, FromPort);
4447 PortReInitBmu(pAC, FromPort);
4448 SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
4449 ClearAndStartRx(pAC, FromPort);
4450 spin_unlock_irqrestore(
4451 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4452 Flags);
4453 break;
4454 case SK_DRV_NET_UP:
4455
4456 FromPort = Param.Para32[0];
4457 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4458 ("NET UP EVENT, Port: %d ", Param.Para32[0]));
4459#ifdef SK98_INFO
4460 printk("%s: network connection up using"
4461 " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
4462
4463
4464 Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
4465 if (Stat == SK_LSPEED_STAT_10MBPS) {
4466 printk(" speed: 10\n");
4467 } else if (Stat == SK_LSPEED_STAT_100MBPS) {
4468 printk(" speed: 100\n");
4469 } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
4470 printk(" speed: 1000\n");
4471 } else {
4472 printk(" speed: unknown\n");
4473 }
4474
4475 Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
4476 if (Stat == SK_LMODE_STAT_AUTOHALF ||
4477 Stat == SK_LMODE_STAT_AUTOFULL) {
4478 printk(" autonegotiation: yes\n");
4479 }
4480 else {
4481 printk(" autonegotiation: no\n");
4482 }
4483 if (Stat == SK_LMODE_STAT_AUTOHALF ||
4484 Stat == SK_LMODE_STAT_HALF) {
4485 printk(" duplex mode: half\n");
4486 }
4487 else {
4488 printk(" duplex mode: full\n");
4489 }
4490 Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
4491 if (Stat == SK_FLOW_STAT_REM_SEND ) {
4492 printk(" flowctrl: remote send\n");
4493 }
4494 else if (Stat == SK_FLOW_STAT_LOC_SEND ){
4495 printk(" flowctrl: local send\n");
4496 }
4497 else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
4498 printk(" flowctrl: symmetric\n");
4499 }
4500 else {
4501 printk(" flowctrl: none\n");
4502 }
4503
4504
4505 if ((pAC->GIni.GICopperType == SK_TRUE) &&
4506 (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
4507 SK_LSPEED_STAT_1000MBPS)) {
4508 Stat = pAC->GIni.GP[FromPort].PMSStatus;
4509 if (Stat == SK_MS_STAT_MASTER ) {
4510 printk(" role: master\n");
4511 }
4512 else if (Stat == SK_MS_STAT_SLAVE ) {
4513 printk(" role: slave\n");
4514 }
4515 else {
4516 printk(" role: ???\n");
4517 }
4518 }
4519
4520#ifdef SK_ZEROCOPY
4521 if (pAC->GIni.GIChipId == CHIP_ID_YUKON)
4522 printk(" scatter-gather: enabled\n");
4523 else
4524 printk(" scatter-gather: disabled\n");
4525
4526#else
4527 printk(" scatter-gather: disabled\n");
4528#endif
4529#endif
4530
4531 if ((Param.Para32[0] != pAC->ActivePort) &&
4532 (pAC->RlmtNets == 1)) {
4533 NewPara.Para32[0] = pAC->ActivePort;
4534 NewPara.Para32[1] = Param.Para32[0];
4535 SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
4536 NewPara);
4537 }
4538
4539
4540#if 0
4541 pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
4542#endif
4543
4544 break;
4545 case SK_DRV_NET_DOWN:
4546
4547 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4548 ("NET DOWN EVENT "));
4549#ifdef SK98_INFO
4550 printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
4551#endif
4552#if 0
4553 pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
4554#endif
4555 break;
4556 case SK_DRV_SWITCH_HARD:
4557 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4558 ("PORT SWITCH HARD "));
4559 case SK_DRV_SWITCH_SOFT:
4560
4561 printk("%s: switching to port %c\n", pAC->dev[0]->name,
4562 'A'+Param.Para32[1]);
4563 case SK_DRV_SWITCH_INTERN:
4564 FromPort = Param.Para32[0];
4565 ToPort = Param.Para32[1];
4566 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4567 ("PORT SWITCH EVENT, From: %d To: %d (Pref %d) ",
4568 FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
4569 NewPara.Para64 = FromPort;
4570 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
4571 NewPara.Para64 = ToPort;
4572 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
4573 spin_lock_irqsave(
4574 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4575 Flags);
4576 spin_lock_irqsave(
4577 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4578 SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
4579 SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
4580 spin_unlock_irqrestore(
4581 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4582 spin_unlock_irqrestore(
4583 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4584 Flags);
4585
4586 ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
4587 ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE);
4588
4589 ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
4590 ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
4591 spin_lock_irqsave(
4592 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4593 Flags);
4594 spin_lock_irqsave(
4595 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4596 pAC->ActivePort = ToPort;
4597#if 0
4598 SetQueueSizes(pAC);
4599#else
4600
4601 DualNet = SK_FALSE;
4602 if (pAC->RlmtNets == 2) {
4603 DualNet = SK_TRUE;
4604 }
4605
4606 if (SkGeInitAssignRamToQueues(
4607 pAC,
4608 pAC->ActivePort,
4609 DualNet)) {
4610 spin_unlock_irqrestore(
4611 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4612 spin_unlock_irqrestore(
4613 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4614 Flags);
4615 printk("SkGeInitAssignRamToQueues failed.\n");
4616 break;
4617 }
4618#endif
4619
4620 if (SkGeInitPort(pAC, IoC, FromPort) ||
4621 SkGeInitPort(pAC, IoC, ToPort)) {
4622 printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
4623 }
4624 if (Event == SK_DRV_SWITCH_SOFT) {
4625 SkMacRxTxEnable(pAC, IoC, FromPort);
4626 }
4627 SkMacRxTxEnable(pAC, IoC, ToPort);
4628 SkAddrSwap(pAC, IoC, FromPort, ToPort);
4629 SkAddrMcUpdate(pAC, IoC, FromPort);
4630 SkAddrMcUpdate(pAC, IoC, ToPort);
4631 PortReInitBmu(pAC, FromPort);
4632 PortReInitBmu(pAC, ToPort);
4633 SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
4634 SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
4635 ClearAndStartRx(pAC, FromPort);
4636 ClearAndStartRx(pAC, ToPort);
4637 spin_unlock_irqrestore(
4638 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4639 spin_unlock_irqrestore(
4640 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4641 Flags);
4642 break;
4643 case SK_DRV_RLMT_SEND:
4644 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4645 ("RLS "));
4646 pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
4647 pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
4648 skb_put(pMsg, pRlmtMbuf->Length);
4649 if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
4650 pMsg) < 0)
4651
4652 DEV_KFREE_SKB_ANY(pMsg);
4653 break;
4654 default:
4655 break;
4656 }
4657 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4658 ("END EVENT "));
4659
4660 return (0);
4661}
4662
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676void SkErrorLog(
4677SK_AC *pAC,
4678int ErrClass,
4679int ErrNum,
4680char *pErrorMsg)
4681{
4682char ClassStr[80];
4683
4684 switch (ErrClass) {
4685 case SK_ERRCL_OTHER:
4686 strcpy(ClassStr, "Other error");
4687 break;
4688 case SK_ERRCL_CONFIG:
4689 strcpy(ClassStr, "Configuration error");
4690 break;
4691 case SK_ERRCL_INIT:
4692 strcpy(ClassStr, "Initialization error");
4693 break;
4694 case SK_ERRCL_NORES:
4695 strcpy(ClassStr, "Out of resources error");
4696 break;
4697 case SK_ERRCL_SW:
4698 strcpy(ClassStr, "internal Software error");
4699 break;
4700 case SK_ERRCL_HW:
4701 strcpy(ClassStr, "Hardware failure");
4702 break;
4703 case SK_ERRCL_COMM:
4704 strcpy(ClassStr, "Communication error");
4705 break;
4706 }
4707 printk(KERN_INFO "%s: -- ERROR --\n Class: %s\n"
4708 " Nr: 0x%x\n Msg: %s\n", pAC->dev[0]->name,
4709 ClassStr, ErrNum, pErrorMsg);
4710
4711}
4712
4713#ifdef DEBUG
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728
4729static void DumpMsg(struct sk_buff *skb, char *str)
4730{
4731 int msglen;
4732
4733 if (skb == NULL) {
4734 printk("DumpMsg(): NULL-Message\n");
4735 return;
4736 }
4737
4738 if (skb->data == NULL) {
4739 printk("DumpMsg(): Message empty\n");
4740 return;
4741 }
4742
4743 msglen = skb->len;
4744 if (msglen > 64)
4745 msglen = 64;
4746
4747 printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
4748
4749 DumpData((char *)skb->data, msglen);
4750
4751 printk("------- End of message ---------\n");
4752}
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
4765
4766static void DumpData(char *p, int size)
4767{
4768register int i;
4769int haddr, addr;
4770char hex_buffer[180];
4771char asc_buffer[180];
4772char HEXCHAR[] = "0123456789ABCDEF";
4773
4774 addr = 0;
4775 haddr = 0;
4776 hex_buffer[0] = 0;
4777 asc_buffer[0] = 0;
4778 for (i=0; i < size; ) {
4779 if (*p >= '0' && *p <='z')
4780 asc_buffer[addr] = *p;
4781 else
4782 asc_buffer[addr] = '.';
4783 addr++;
4784 asc_buffer[addr] = 0;
4785 hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
4786 haddr++;
4787 hex_buffer[haddr] = HEXCHAR[*p & 0x0f];
4788 haddr++;
4789 hex_buffer[haddr] = ' ';
4790 haddr++;
4791 hex_buffer[haddr] = 0;
4792 p++;
4793 i++;
4794 if (i%16 == 0) {
4795 printk("%s %s\n", hex_buffer, asc_buffer);
4796 addr = 0;
4797 haddr = 0;
4798 }
4799 }
4800}
4801
4802
4803
4804
4805
4806
4807
4808
4809
4810
4811
4812
4813
4814static void DumpLong(char *pc, int size)
4815{
4816register int i;
4817int haddr, addr;
4818char hex_buffer[180];
4819char asc_buffer[180];
4820char HEXCHAR[] = "0123456789ABCDEF";
4821long *p;
4822int l;
4823
4824 addr = 0;
4825 haddr = 0;
4826 hex_buffer[0] = 0;
4827 asc_buffer[0] = 0;
4828 p = (long*) pc;
4829 for (i=0; i < size; ) {
4830 l = (long) *p;
4831 hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
4832 haddr++;
4833 hex_buffer[haddr] = HEXCHAR[(l >> 24) & 0xf];
4834 haddr++;
4835 hex_buffer[haddr] = HEXCHAR[(l >> 20) & 0xf];
4836 haddr++;
4837 hex_buffer[haddr] = HEXCHAR[(l >> 16) & 0xf];
4838 haddr++;
4839 hex_buffer[haddr] = HEXCHAR[(l >> 12) & 0xf];
4840 haddr++;
4841 hex_buffer[haddr] = HEXCHAR[(l >> 8) & 0xf];
4842 haddr++;
4843 hex_buffer[haddr] = HEXCHAR[(l >> 4) & 0xf];
4844 haddr++;
4845 hex_buffer[haddr] = HEXCHAR[l & 0x0f];
4846 haddr++;
4847 hex_buffer[haddr] = ' ';
4848 haddr++;
4849 hex_buffer[haddr] = 0;
4850 p++;
4851 i++;
4852 if (i%8 == 0) {
4853 printk("%4x %s\n", (i-8)*4, hex_buffer);
4854 haddr = 0;
4855 }
4856 }
4857 printk("------------------------\n");
4858}
4859
4860#endif
4861