LXR uboot/drivers/usb/host/ohci.h

   1/*
   2 * URB OHCI HCD (Host Controller Driver) for USB.
   3 *
   4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5 * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
   6 *
   7 * usb-ohci.h
   8 */
   9
  10/* functions for doing board or CPU specific setup/cleanup */
  11extern int usb_board_init(void);
  12extern int usb_board_stop(void);
  13extern int usb_board_init_fail(void);
  14
  15extern int usb_cpu_init(void);
  16extern int usb_cpu_stop(void);
  17extern int usb_cpu_init_fail(void);
  18
  19
  20static int cc_to_error[16] = {
  21
  22/* mapping of the OHCI CC status to error codes */
  23        /* No  Error  */               0,
  24        /* CRC Error  */               USB_ST_CRC_ERR,
  25        /* Bit Stuff  */               USB_ST_BIT_ERR,
  26        /* Data Togg  */               USB_ST_CRC_ERR,
  27        /* Stall      */               USB_ST_STALLED,
  28        /* DevNotResp */               -1,
  29        /* PIDCheck   */               USB_ST_BIT_ERR,
  30        /* UnExpPID   */               USB_ST_BIT_ERR,
  31        /* DataOver   */               USB_ST_BUF_ERR,
  32        /* DataUnder  */               USB_ST_BUF_ERR,
  33        /* reservd    */               -1,
  34        /* reservd    */               -1,
  35        /* BufferOver */               USB_ST_BUF_ERR,
  36        /* BuffUnder  */               USB_ST_BUF_ERR,
  37        /* Not Access */               -1,
  38        /* Not Access */               -1
  39};
  40
  41static const char *cc_to_string[16] = {
  42        "No Error",
  43        "CRC: Last data packet from endpoint contained a CRC error.",
  44        "BITSTUFFING: Last data packet from endpoint contained a bit " \
  45                     "stuffing violation",
  46        "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
  47                     "that did not match the expected value.",
  48        "STALL: TD was moved to the Done Queue because the endpoint returned" \
  49                     " a STALL PID",
  50        "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
  51                     "not provide a handshake (OUT)",
  52        "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
  53                     "(IN) or handshake (OUT)",
  54        "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
  55                     "value is not defined.",
  56        "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
  57                     "either the size of the maximum data packet allowed\n" \
  58                     "from the endpoint (found in MaximumPacketSize field\n" \
  59                     "of ED) or the remaining buffer size.",
  60        "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
  61                     "and that amount was not sufficient to fill the\n" \
  62                     "specified buffer",
  63        "reserved1",
  64        "reserved2",
  65        "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
  66                     "than it could be written to system memory",
  67        "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
  68                     "system memory fast enough to keep up with data USB " \
  69                     "data rate.",
  70        "NOT ACCESSED: This code is set by software before the TD is placed" \
  71                     "on a list to be processed by the HC.(1)",
  72        "NOT ACCESSED: This code is set by software before the TD is placed" \
  73                     "on a list to be processed by the HC.(2)",
  74};
  75
  76/* ED States */
  77
  78#define ED_NEW          0x00
  79#define ED_UNLINK       0x01
  80#define ED_OPER         0x02
  81#define ED_DEL          0x04
  82#define ED_URB_DEL      0x08
  83
  84/* usb_ohci_ed */
  85struct ed {
  86        __u32 hwINFO;
  87        __u32 hwTailP;
  88        __u32 hwHeadP;
  89        __u32 hwNextED;
  90
  91        struct ed *ed_prev;
  92        __u8 int_period;
  93        __u8 int_branch;
  94        __u8 int_load;
  95        __u8 int_interval;
  96        __u8 state;
  97        __u8 type;
  98        __u16 last_iso;
  99        struct ed *ed_rm_list;
 100
 101        struct usb_device *usb_dev;
 102        void *purb;
 103        __u32 unused[2];
 104} __attribute__((aligned(16)));
 105typedef struct ed ed_t;
 106
 107
 108/* TD info field */
 109#define TD_CC       0xf0000000
 110#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
 111#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
 112#define TD_EC       0x0C000000
 113#define TD_T        0x03000000
 114#define TD_T_DATA0  0x02000000
 115#define TD_T_DATA1  0x03000000
 116#define TD_T_TOGGLE 0x00000000
 117#define TD_R        0x00040000
 118#define TD_DI       0x00E00000
 119#define TD_DI_SET(X) (((X) & 0x07)<< 21)
 120#define TD_DP       0x00180000
 121#define TD_DP_SETUP 0x00000000
 122#define TD_DP_IN    0x00100000
 123#define TD_DP_OUT   0x00080000
 124
 125#define TD_ISO      0x00010000
 126#define TD_DEL      0x00020000
 127
 128/* CC Codes */
 129#define TD_CC_NOERROR      0x00
 130#define TD_CC_CRC          0x01
 131#define TD_CC_BITSTUFFING  0x02
 132#define TD_CC_DATATOGGLEM  0x03
 133#define TD_CC_STALL        0x04
 134#define TD_DEVNOTRESP      0x05
 135#define TD_PIDCHECKFAIL    0x06
 136#define TD_UNEXPECTEDPID   0x07
 137#define TD_DATAOVERRUN     0x08
 138#define TD_DATAUNDERRUN    0x09
 139#define TD_BUFFEROVERRUN   0x0C
 140#define TD_BUFFERUNDERRUN  0x0D
 141#define TD_NOTACCESSED     0x0F
 142
 143
 144#define MAXPSW 1
 145
 146struct td {
 147        __u32 hwINFO;
 148        __u32 hwCBP;            /* Current Buffer Pointer */
 149        __u32 hwNextTD;         /* Next TD Pointer */
 150        __u32 hwBE;             /* Memory Buffer End Pointer */
 151
 152/* #ifndef CONFIG_MPC5200 /\* this seems wrong *\/ */
 153        __u16 hwPSW[MAXPSW];
 154/* #endif */
 155        __u8 unused;
 156        __u8 index;
 157        struct ed *ed;
 158        struct td *next_dl_td;
 159        struct usb_device *usb_dev;
 160        int transfer_len;
 161        __u32 data;
 162
 163        __u32 unused2[2];
 164} __attribute__((aligned(32)));
 165typedef struct td td_t;
 166
 167#define OHCI_ED_SKIP    (1 << 14)
 168
 169/*
 170 * The HCCA (Host Controller Communications Area) is a 256 byte
 171 * structure defined in the OHCI spec. that the host controller is
 172 * told the base address of.  It must be 256-byte aligned.
 173 */
 174
 175#define NUM_INTS 32     /* part of the OHCI standard */
 176struct ohci_hcca {
 177        __u32   int_table[NUM_INTS];    /* Interrupt ED table */
 178#if defined(CONFIG_MPC5200)
 179        __u16   pad1;                   /* set to 0 on each frame_no change */
 180        __u16   frame_no;               /* current frame number */
 181#else
 182        __u16   frame_no;               /* current frame number */
 183        __u16   pad1;                   /* set to 0 on each frame_no change */
 184#endif
 185        __u32   done_head;              /* info returned for an interrupt */
 186        u8              reserved_for_hc[116];
 187} __attribute__((aligned(256)));
 188
 189
 190/*
 191 * Maximum number of root hub ports.
 192 */
 193#ifndef CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
 194# error "CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS undefined!"
 195#endif
 196
 197/*
 198 * This is the structure of the OHCI controller's memory mapped I/O
 199 * region.  This is Memory Mapped I/O.  You must use the readl() and
 200 * writel() macros defined in asm/io.h to access these!!
 201 */
 202struct ohci_regs {
 203        /* control and status registers */
 204        __u32   revision;
 205        __u32   control;
 206        __u32   cmdstatus;
 207        __u32   intrstatus;
 208        __u32   intrenable;
 209        __u32   intrdisable;
 210        /* memory pointers */
 211        __u32   hcca;
 212        __u32   ed_periodcurrent;
 213        __u32   ed_controlhead;
 214        __u32   ed_controlcurrent;
 215        __u32   ed_bulkhead;
 216        __u32   ed_bulkcurrent;
 217        __u32   donehead;
 218        /* frame counters */
 219        __u32   fminterval;
 220        __u32   fmremaining;
 221        __u32   fmnumber;
 222        __u32   periodicstart;
 223        __u32   lsthresh;
 224        /* Root hub ports */
 225        struct  ohci_roothub_regs {
 226                __u32   a;
 227                __u32   b;
 228                __u32   status;
 229                __u32   portstatus[CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS];
 230        } roothub;
 231} __attribute__((aligned(32)));
 232
 233/* Some EHCI controls */
 234#define EHCI_USBCMD_OFF         0x20
 235#define EHCI_USBCMD_HCRESET     (1 << 1)
 236
 237/* OHCI CONTROL AND STATUS REGISTER MASKS */
 238
 239/*
 240 * HcControl (control) register masks
 241 */
 242#define OHCI_CTRL_CBSR  (3 << 0)        /* control/bulk service ratio */
 243#define OHCI_CTRL_PLE   (1 << 2)        /* periodic list enable */
 244#define OHCI_CTRL_IE    (1 << 3)        /* isochronous enable */
 245#define OHCI_CTRL_CLE   (1 << 4)        /* control list enable */
 246#define OHCI_CTRL_BLE   (1 << 5)        /* bulk list enable */
 247#define OHCI_CTRL_HCFS  (3 << 6)        /* host controller functional state */
 248#define OHCI_CTRL_IR    (1 << 8)        /* interrupt routing */
 249#define OHCI_CTRL_RWC   (1 << 9)        /* remote wakeup connected */
 250#define OHCI_CTRL_RWE   (1 << 10)       /* remote wakeup enable */
 251
 252/* pre-shifted values for HCFS */
 253#       define OHCI_USB_RESET   (0 << 6)
 254#       define OHCI_USB_RESUME  (1 << 6)
 255#       define OHCI_USB_OPER    (2 << 6)
 256#       define OHCI_USB_SUSPEND (3 << 6)
 257
 258/*
 259 * HcCommandStatus (cmdstatus) register masks
 260 */
 261#define OHCI_HCR        (1 << 0)        /* host controller reset */
 262#define OHCI_CLF        (1 << 1)        /* control list filled */
 263#define OHCI_BLF        (1 << 2)        /* bulk list filled */
 264#define OHCI_OCR        (1 << 3)        /* ownership change request */
 265#define OHCI_SOC        (3 << 16)       /* scheduling overrun count */
 266
 267/*
 268 * masks used with interrupt registers:
 269 * HcInterruptStatus (intrstatus)
 270 * HcInterruptEnable (intrenable)
 271 * HcInterruptDisable (intrdisable)
 272 */
 273#define OHCI_INTR_SO    (1 << 0)        /* scheduling overrun */
 274#define OHCI_INTR_WDH   (1 << 1)        /* writeback of done_head */
 275#define OHCI_INTR_SF    (1 << 2)        /* start frame */
 276#define OHCI_INTR_RD    (1 << 3)        /* resume detect */
 277#define OHCI_INTR_UE    (1 << 4)        /* unrecoverable error */
 278#define OHCI_INTR_FNO   (1 << 5)        /* frame number overflow */
 279#define OHCI_INTR_RHSC  (1 << 6)        /* root hub status change */
 280#define OHCI_INTR_OC    (1 << 30)       /* ownership change */
 281#define OHCI_INTR_MIE   (1 << 31)       /* master interrupt enable */
 282
 283
 284/* Virtual Root HUB */
 285struct virt_root_hub {
 286        int devnum; /* Address of Root Hub endpoint */
 287        void *dev;  /* was urb */
 288        void *int_addr;
 289        int send;
 290        int interval;
 291};
 292
 293/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
 294
 295/* destination of request */
 296#define RH_INTERFACE               0x01
 297#define RH_ENDPOINT                0x02
 298#define RH_OTHER                   0x03
 299
 300#define RH_CLASS                   0x20
 301#define RH_VENDOR                  0x40
 302
 303/* Requests: bRequest << 8 | bmRequestType */
 304#define RH_GET_STATUS           0x0080
 305#define RH_CLEAR_FEATURE        0x0100
 306#define RH_SET_FEATURE          0x0300
 307#define RH_SET_ADDRESS          0x0500
 308#define RH_GET_DESCRIPTOR       0x0680
 309#define RH_SET_DESCRIPTOR       0x0700
 310#define RH_GET_CONFIGURATION    0x0880
 311#define RH_SET_CONFIGURATION    0x0900
 312#define RH_GET_STATE            0x0280
 313#define RH_GET_INTERFACE        0x0A80
 314#define RH_SET_INTERFACE        0x0B00
 315#define RH_SYNC_FRAME           0x0C80
 316/* Our Vendor Specific Request */
 317#define RH_SET_EP               0x2000
 318
 319
 320/* Hub port features */
 321#define RH_PORT_CONNECTION         0x00
 322#define RH_PORT_ENABLE             0x01
 323#define RH_PORT_SUSPEND            0x02
 324#define RH_PORT_OVER_CURRENT       0x03
 325#define RH_PORT_RESET              0x04
 326#define RH_PORT_POWER              0x08
 327#define RH_PORT_LOW_SPEED          0x09
 328
 329#define RH_C_PORT_CONNECTION       0x10
 330#define RH_C_PORT_ENABLE           0x11
 331#define RH_C_PORT_SUSPEND          0x12
 332#define RH_C_PORT_OVER_CURRENT     0x13
 333#define RH_C_PORT_RESET            0x14
 334
 335/* Hub features */
 336#define RH_C_HUB_LOCAL_POWER       0x00
 337#define RH_C_HUB_OVER_CURRENT      0x01
 338
 339#define RH_DEVICE_REMOTE_WAKEUP    0x00
 340#define RH_ENDPOINT_STALL          0x01
 341
 342#define RH_ACK                     0x01
 343#define RH_REQ_ERR                 -1
 344#define RH_NACK                    0x00
 345
 346
 347/* OHCI ROOT HUB REGISTER MASKS */
 348
 349/* roothub.portstatus [i] bits */
 350#define RH_PS_CCS            0x00000001         /* current connect status */
 351#define RH_PS_PES            0x00000002         /* port enable status*/
 352#define RH_PS_PSS            0x00000004         /* port suspend status */
 353#define RH_PS_POCI           0x00000008         /* port over current indicator */
 354#define RH_PS_PRS            0x00000010         /* port reset status */
 355#define RH_PS_PPS            0x00000100         /* port power status */
 356#define RH_PS_LSDA           0x00000200         /* low speed device attached */
 357#define RH_PS_CSC            0x00010000         /* connect status change */
 358#define RH_PS_PESC           0x00020000         /* port enable status change */
 359#define RH_PS_PSSC           0x00040000         /* port suspend status change */
 360#define RH_PS_OCIC           0x00080000         /* over current indicator change */
 361#define RH_PS_PRSC           0x00100000         /* port reset status change */
 362
 363/* roothub.status bits */
 364#define RH_HS_LPS            0x00000001         /* local power status */
 365#define RH_HS_OCI            0x00000002         /* over current indicator */
 366#define RH_HS_DRWE           0x00008000         /* device remote wakeup enable */
 367#define RH_HS_LPSC           0x00010000         /* local power status change */
 368#define RH_HS_OCIC           0x00020000         /* over current indicator change */
 369#define RH_HS_CRWE           0x80000000         /* clear remote wakeup enable */
 370
 371/* roothub.b masks */
 372#define RH_B_DR         0x0000ffff              /* device removable flags */
 373#define RH_B_PPCM       0xffff0000              /* port power control mask */
 374
 375/* roothub.a masks */
 376#define RH_A_NDP        (0xff << 0)             /* number of downstream ports */
 377#define RH_A_PSM        (1 << 8)                /* power switching mode */
 378#define RH_A_NPS        (1 << 9)                /* no power switching */
 379#define RH_A_DT         (1 << 10)               /* device type (mbz) */
 380#define RH_A_OCPM       (1 << 11)               /* over current protection mode */
 381#define RH_A_NOCP       (1 << 12)               /* no over current protection */
 382#define RH_A_POTPGT     (0xff << 24)            /* power on to power good time */
 383
 384/* urb */
 385#define N_URB_TD 48
 386typedef struct
 387{
 388        ed_t *ed;
 389        __u16 length;   /* number of tds associated with this request */
 390        __u16 td_cnt;   /* number of tds already serviced */
 391        struct usb_device *dev;
 392        int   state;
 393        unsigned long pipe;
 394        void *transfer_buffer;
 395        int transfer_buffer_length;
 396        int interval;
 397        int actual_length;
 398        int finished;
 399        td_t *td[N_URB_TD];     /* list pointer to all corresponding TDs associated with this request */
 400} urb_priv_t;
 401#define URB_DEL 1
 402
 403/*
 404 * This is the full ohci controller description
 405 *
 406 * Note how the "proper" USB information is just
 407 * a subset of what the full implementation needs. (Linus)
 408 */
 409
 410
 411typedef struct ohci {
 412        struct ohci_hcca *hcca;         /* hcca */
 413        /*dma_addr_t hcca_dma;*/
 414
 415        int irq;
 416        int disabled;                   /* e.g. got a UE, we're hung */
 417        int sleeping;
 418        unsigned long flags;            /* for HC bugs */
 419
 420        struct ohci_regs *regs; /* OHCI controller's memory */
 421
 422        int ohci_int_load[32];   /* load of the 32 Interrupt Chains (for load balancing)*/
 423        ed_t *ed_rm_list[2];     /* lists of all endpoints to be removed */
 424        ed_t *ed_bulktail;       /* last endpoint of bulk list */
 425        ed_t *ed_controltail;    /* last endpoint of control list */
 426        int intrstatus;
 427        __u32 hc_control;               /* copy of the hc control reg */
 428        struct usb_device *dev[32];
 429        struct virt_root_hub rh;
 430
 431        const char      *slot_name;
 432} ohci_t;
 433
 434#define NUM_EDS 8               /* num of preallocated endpoint descriptors */
 435
 436struct ohci_device {
 437        ed_t    ed[NUM_EDS];
 438        int ed_cnt;
 439};
 440
 441/* hcd */
 442/* endpoint */
 443static int ep_link(ohci_t * ohci, ed_t * ed);
 444static int ep_unlink(ohci_t * ohci, ed_t * ed);
 445static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned long pipe,
 446                int interval, int load);
 447
 448/*-------------------------------------------------------------------------*/
 449
 450/* we need more TDs than EDs */
 451#define NUM_TD 64
 452
 453/* +1 so we can align the storage */
 454td_t gtd[NUM_TD+1];
 455/* pointers to aligned storage */
 456td_t *ptd;
 457
 458/* TDs ... */
 459static inline struct td *
 460td_alloc (struct usb_device *usb_dev)
 461{
 462        int i;
 463        struct td       *td;
 464
 465        td = NULL;
 466        for (i = 0; i < NUM_TD; i++)
 467        {
 468                if (ptd[i].usb_dev == NULL)
 469                {
 470                        td = &ptd[i];
 471                        td->usb_dev = usb_dev;
 472                        break;
 473                }
 474        }
 475
 476        return td;
 477}
 478
 479static inline void
 480ed_free (struct ed *ed)
 481{
 482        ed->usb_dev = NULL;
 483}
 484