LXR uboot/include/configs/DK1C20.h

   1/*
   2 * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
   3 * Scott McNutt <smcnutt@psyent.com>
   4 * Stephan Linz <linz@li-pro.net>
   5 *
   6 * CompactFlash/IDE:
   7 * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 */
  27
  28#ifndef __CONFIG_H
  29#define __CONFIG_H
  30
  31/***********************************************************************
  32 * Include the whole NIOS CPU configuration.
  33 *
  34 * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
  35 *
  36 ***********************************************************************/
  37
  38#if     defined(CONFIG_NIOS_SAFE_32)
  39#include <configs/DK1C20_safe_32.h>
  40#elif   defined(CONFIG_NIOS_STANDARD_32)
  41#include <configs/DK1C20_standard_32.h>
  42#else
  43#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
  44#endif
  45
  46/*------------------------------------------------------------------------
  47 * BOARD/CPU -- TOP-LEVEL
  48 *----------------------------------------------------------------------*/
  49#define CONFIG_NIOS             1               /* NIOS-32 core         */
  50#define CONFIG_DK1C20           1               /* Cyclone DK-1C20 board*/
  51#define CONFIG_SYS_CLK_FREQ     CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock     */
  52#define CONFIG_SYS_HZ                   1000            /* 1 msec time tick     */
  53#define CONFIG_BOARD_EARLY_INIT_F 1     /* enable early board-spec. init*/
  54
  55/*------------------------------------------------------------------------
  56 * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
  57 *----------------------------------------------------------------------*/
  58#if     (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
  59
  60#define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_NIOS_CPU_SDRAM_BASE
  61#define CONFIG_SYS_SDRAM_SIZE           CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
  62
  63#else
  64#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
  65#endif
  66
  67#define CONFIG_SYS_SRAM_BASE            CONFIG_SYS_NIOS_CPU_SRAM_BASE
  68#define CONFIG_SYS_SRAM_SIZE            CONFIG_SYS_NIOS_CPU_SRAM_SIZE
  69#define CONFIG_SYS_VECT_BASE            CONFIG_SYS_NIOS_CPU_VEC_BASE
  70
  71/*------------------------------------------------------------------------
  72 * MEMORY ORGANIZATION - For the most part, you can put things pretty
  73 * much anywhere. This is pretty flexible for Nios. So here we make some
  74 * arbitrary choices & assume that the monitor is placed at the end of
  75 * a memory resource (so you must make sure TEXT_BASE is chosen
  76 * appropriately).
  77 *
  78 *      -The heap is placed below the monitor.
  79 *      -Global data is placed below the heap.
  80 *      -The stack is placed below global data (&grows down).
  81 *----------------------------------------------------------------------*/
  82#define CONFIG_SYS_MONITOR_LEN          (256 * 1024)    /* Reserve 256k         */
  83#define CONFIG_SYS_GBL_DATA_SIZE        128             /* Global data size rsvd*/
  84#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  85
  86#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
  87#define CONFIG_SYS_MALLOC_BASE          (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
  88#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
  89#define CONFIG_SYS_INIT_SP              CONFIG_SYS_GBL_DATA_OFFSET
  90
  91/*------------------------------------------------------------------------
  92 * FLASH (AM29LV065D)
  93 *----------------------------------------------------------------------*/
  94#if     (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
  95
  96#define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_NIOS_CPU_FLASH_BASE
  97#define CONFIG_SYS_FLASH_SIZE           CONFIG_SYS_NIOS_CPU_FLASH_SIZE
  98#define CONFIG_SYS_MAX_FLASH_SECT       128             /* Max # sects per bank */
  99#define CONFIG_SYS_MAX_FLASH_BANKS      1               /* Max # of flash banks */
 100#define CONFIG_SYS_FLASH_ERASE_TOUT     8000            /* Erase timeout (msec) */
 101#define CONFIG_SYS_FLASH_WRITE_TOUT     100             /* Write timeout (msec) */
 102#define CONFIG_SYS_FLASH_WORD_SIZE      unsigned char   /* flash word size      */
 103
 104#else
 105#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
 106#endif
 107
 108/*------------------------------------------------------------------------
 109 * ENVIRONMENT
 110 *----------------------------------------------------------------------*/
 111#if     (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
 112
 113#define CONFIG_ENV_IS_IN_FLASH  1               /* Environment in flash */
 114#define CONFIG_ENV_ADDR         CONFIG_SYS_FLASH_BASE   /* Mem addr of env      */
 115#define CONFIG_ENV_SIZE         (64 * 1024)     /* 64 KByte (1 sector)  */
 116#define CONFIG_ENV_OVERWRITE                    /* Serial/eth change Ok */
 117
 118#else
 119#define CONFIG_ENV_IS_NOWHERE   1               /* NO Environment       */
 120#endif
 121
 122/*------------------------------------------------------------------------
 123 * CONSOLE
 124 *----------------------------------------------------------------------*/
 125#if     (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
 126
 127#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
 128
 129#if     (CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
 130#define CONFIG_SYS_NIOS_FIXEDBAUD       1                  /* Baudrate is fixed */
 131#define CONFIG_BAUDRATE         CONFIG_SYS_NIOS_CPU_UART0_BR
 132#else
 133#undef  CONFIG_SYS_NIOS_FIXEDBAUD
 134#define CONFIG_BAUDRATE         115200
 135#endif
 136
 137#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 138
 139#else
 140#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
 141#endif
 142
 143/*------------------------------------------------------------------------
 144 * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
 145 * so an avalon bus timer is required.
 146 *----------------------------------------------------------------------*/
 147#if     (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0)
 148
 149#if     (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
 150
 151#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick    */
 152#define CONFIG_SYS_NIOS_TMRIRQ          CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
 153
 154#if     (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1)                /* fixed period */
 155
 156#if     (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
 157#define CONFIG_SYS_NIOS_TMRMS           (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
 158#else
 159#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
 160#endif
 161
 162#undef  CONFIG_SYS_NIOS_TMRCNT  /* no preloadable counter value */
 163
 164#elif   (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0)                /* variable period */
 165
 166#if     (CONFIG_SYS_HZ <= 1000)
 167#define CONFIG_SYS_NIOS_TMRMS           (1000 / CONFIG_SYS_HZ)
 168#else
 169#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
 170#endif
 171
 172#define CONFIG_SYS_NIOS_TMRCNT          (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
 173
 174#else
 175#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
 176#endif
 177
 178#elif   (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
 179
 180#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick    */
 181#define CONFIG_SYS_NIOS_TMRIRQ          CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
 182
 183#if     (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1)                /* fixed period */
 184
 185#if     (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
 186#define CONFIG_SYS_NIOS_TMRMS           (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
 187#else
 188#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
 189#endif
 190
 191#undef  CONFIG_SYS_NIOS_TMRCNT  /* no preloadable counter value */
 192
 193#elif   (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0)                /* variable period */
 194
 195#if     (CONFIG_SYS_HZ <= 1000)
 196#define CONFIG_SYS_NIOS_TMRMS           (1000 / CONFIG_SYS_HZ)
 197#else
 198#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
 199#endif
 200
 201#define CONFIG_SYS_NIOS_TMRCNT          (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
 202
 203#else
 204#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
 205#endif
 206
 207#endif  /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
 208
 209#else
 210#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
 211#endif
 212
 213/*------------------------------------------------------------------------
 214 * Ethernet
 215 *----------------------------------------------------------------------*/
 216#if     (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
 217
 218#if     (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0)            /* LAN91C111            */
 219
 220#define CONFIG_DRIVER_SMC91111                  /* Using SMC91c111      */
 221#undef  CONFIG_SMC91111_EXT_PHY                 /* Internal PHY         */
 222#define CONFIG_SMC91111_BASE    (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
 223
 224#if     (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
 225#define CONFIG_SMC_USE_32_BIT   1
 226#else   /* no */
 227#undef  CONFIG_SMC_USE_32_BIT
 228#endif
 229
 230#elif   (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1)            /* CS8900A              */
 231
 232        /********************************************/
 233        /* !!! CS8900 is __not__ tested on NIOS !!! */
 234        /********************************************/
 235#define CONFIG_DRIVER_CS8900                    /* Using CS8900         */
 236#define CS8900_BASE             (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
 237
 238#if     (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
 239#undef  CS8900_BUS16
 240#define CS8900_BUS32            1
 241#else   /* no */
 242#define CS8900_BUS16            1
 243#undef  CS8900_BUS32
 244#endif
 245
 246#else
 247#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
 248#endif
 249
 250#define CONFIG_ETHADDR          08:00:3e:26:0a:5b
 251#define CONFIG_NETMASK          255.255.255.0
 252#define CONFIG_IPADDR           192.168.2.21
 253#define CONFIG_SERVERIP         192.168.2.16
 254
 255#else
 256#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
 257#endif
 258
 259/*------------------------------------------------------------------------
 260 * STATUS LEDs
 261 *----------------------------------------------------------------------*/
 262#if     (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
 263
 264#if     (CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
 265
 266#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h
 267
 268#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
 269
 270#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h
 271
 272#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
 273
 274#define STATUS_LED_BASE                 CONFIG_SYS_NIOS_CPU_PIO2
 275#define STATUS_LED_BITS                 CONFIG_SYS_NIOS_CPU_PIO2_BITS
 276#define STATUS_LED_ACTIVE               1 /* LED on for bit == 1 */
 277
 278#if     (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
 279#define STATUS_LED_WRONLY               1
 280#else
 281#undef  STATUS_LED_WRONLY
 282#endif
 283
 284#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
 285
 286#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
 287
 288#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
 289
 290#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
 291
 292#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
 293
 294#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
 295
 296#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
 297
 298#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
 299
 300#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
 301
 302#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
 303
 304#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
 305
 306#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
 307
 308#elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
 309
 310#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
 311
 312#else
 313#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
 314#endif
 315
 316#define CONFIG_STATUS_LED               1 /* enable status led driver */
 317
 318#define STATUS_LED_BIT                  (1 << 0)        /* LED[0] */
 319#define STATUS_LED_STATE                STATUS_LED_BLINKING
 320#define STATUS_LED_BOOT_STATE           STATUS_LED_OFF
 321#define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 10)    /* ca. 1 Hz */
 322#define STATUS_LED_BOOT                 0               /* boot LED */
 323
 324#if     (STATUS_LED_BITS > 1)
 325#define STATUS_LED_BIT1                 (1 << 1)        /* LED[1] */
 326#define STATUS_LED_STATE1               STATUS_LED_OFF
 327#define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 50)    /* ca. 5 Hz */
 328#define STATUS_LED_RED                  1               /* fail LED */
 329#endif
 330
 331#if     (STATUS_LED_BITS > 2)
 332#define STATUS_LED_BIT2                 (1 << 2)        /* LED[2] */
 333#define STATUS_LED_STATE2               STATUS_LED_OFF
 334#define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 10)    /* ca. 1 Hz */
 335#define STATUS_LED_YELLOW               2               /* info LED */
 336#endif
 337
 338#if     (STATUS_LED_BITS > 3)
 339#define STATUS_LED_BIT3                 (1 << 3)        /* LED[3] */
 340#define STATUS_LED_STATE3               STATUS_LED_OFF
 341#define STATUS_LED_PERIOD3              (CONFIG_SYS_HZ / 10)    /* ca. 1 Hz */
 342#define STATUS_LED_GREEN                3               /* info LED */
 343#endif
 344
 345#define STATUS_LED_PAR                  1 /* makes status_led.h happy */
 346
 347#endif  /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
 348
 349/*------------------------------------------------------------------------
 350 * SEVEN SEGMENT LED DISPLAY
 351 *----------------------------------------------------------------------*/
 352#if     (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
 353
 354#if     (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0)
 355
 356#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h
 357
 358#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1)
 359
 360#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h
 361
 362#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2)
 363
 364#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h
 365
 366#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3)
 367
 368#define SEVENSEG_BASE                   CONFIG_SYS_NIOS_CPU_PIO3
 369#define SEVENSEG_BITS                   CONFIG_SYS_NIOS_CPU_PIO3_BITS
 370#define SEVENSEG_ACTIVE                 0 /* LED on for bit == 1 */
 371
 372#if     (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1)
 373#define SEVENSEG_WRONLY                 1
 374#else
 375#undef  SEVENSEG_WRONLY
 376#endif
 377
 378#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4)
 379
 380#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h
 381
 382#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5)
 383
 384#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h
 385
 386#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6)
 387
 388#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h
 389
 390#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7)
 391
 392#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h
 393
 394#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8)
 395
 396#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h
 397
 398#elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9)
 399
 400#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h
 401
 402#else
 403#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case
 404#endif
 405
 406#define CONFIG_SEVENSEG                 1 /* enable seven segment led driver */
 407
 408/*
 409 * Dual 7-Segment Display pin assignment -- read more in your
 410 * "Nios Development Board Reference Manual"
 411 *
 412 *
 413 *    (U8) HI:D[15..8]     (U9) LO:D[7..0]
 414 *         ______               ______
 415 *        |  D14 |             |  D6  |
 416 *        |      |             |      |
 417 *      D9|      |D13        D1|      |D5
 418 *        |______|             |______|                  ___
 419 *        |  D8  |             |  D0  |                 | A |
 420 *        |      |             |      |                F|___|B
 421 *     D10|      |D12        D2|      |D4               | G |
 422 *        |______|             |______|                E|___|C
 423 *           D11  *               D3   *                  D  *
 424 *                D15                  D7                    DP
 425 *
 426 */
 427#define SEVENSEG_DIGIT_HI_LO_EQUAL      1       /* high nibble equal low nibble */
 428#define SEVENSEG_DIGIT_A                (1 << 6) /* bit 6 is segment A */
 429#define SEVENSEG_DIGIT_B                (1 << 5) /* bit 5 is segment B */
 430#define SEVENSEG_DIGIT_C                (1 << 4) /* bit 4 is segment C */
 431#define SEVENSEG_DIGIT_D                (1 << 3) /* bit 3 is segment D */
 432#define SEVENSEG_DIGIT_E                (1 << 2) /* bit 2 is segment E */
 433#define SEVENSEG_DIGIT_F                (1 << 1) /* bit 1 is segment F */
 434#define SEVENSEG_DIGIT_G                (1 << 0) /* bit 0 is segment G */
 435#define SEVENSEG_DIGIT_DP               (1 << 7) /* bit 7 is decimal point */
 436
 437#endif  /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
 438
 439/*------------------------------------------------------------------------
 440 * ASMI - Active Serial Memory Interface.
 441 *
 442 * ASMI is for Cyclone devices only and only works when the configuration
 443 * is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details.
 444 *----------------------------------------------------------------------*/
 445#define CONFIG_NIOS_ASMI                           /* Enable ASMI       */
 446#define CONFIG_SYS_NIOS_ASMIBASE        CONFIG_SYS_NIOS_CPU_ASMI0 /* ASMI base address  */
 447
 448
 449/*
 450 * BOOTP options
 451 */
 452#define CONFIG_BOOTP_BOOTFILESIZE
 453#define CONFIG_BOOTP_BOOTPATH
 454#define CONFIG_BOOTP_GATEWAY
 455#define CONFIG_BOOTP_HOSTNAME
 456
 457
 458/*
 459 * Command line configuration.
 460 */
 461#include <config_cmd_default.h>
 462
 463#define CONFIG_CMD_CDP
 464#define CONFIG_CMD_DHCP
 465#define CONFIG_CMD_DIAG
 466#define CONFIG_CMD_DISPLAY
 467#define CONFIG_CMD_EXT2
 468#define CONFIG_CMD_FAT
 469#define CONFIG_CMD_IDE
 470#define CONFIG_CMD_IMMAP
 471#define CONFIG_CMD_IRQ
 472#define CONFIG_CMD_PING
 473#define CONFIG_CMD_PORTIO
 474#define CONFIG_CMD_REGINFO
 475#define CONFIG_CMD_SAVES
 476#define CONFIG_CMD_SDRAM
 477#define CONFIG_CMD_SNTP
 478
 479#undef CONFIG_CMD_NFS
 480#undef CONFIG_CMD_XIMG
 481
 482/*------------------------------------------------------------------------
 483 * COMPACT FLASH
 484 *----------------------------------------------------------------------*/
 485#if defined(CONFIG_CMD_IDE)
 486#define CONFIG_IDE_PREINIT                      /* Implement id_preinit */
 487#define CONFIG_SYS_IDE_MAXBUS           1               /* 1 IDE bus            */
 488#define CONFIG_SYS_IDE_MAXDEVICE        1               /* 1 drive per IDE bus  */
 489
 490#define CONFIG_SYS_ATA_BASE_ADDR        0x00920a00      /* IDE/ATA base addr    */
 491#define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000          /* IDE0 offset          */
 492#define CONFIG_SYS_ATA_DATA_OFFSET      0x0040          /* Data IO offset       */
 493#define CONFIG_SYS_ATA_REG_OFFSET       0x0040          /* Register offset      */
 494#define CONFIG_SYS_ATA_ALT_OFFSET       0x0100          /* Alternate reg offset */
 495#define CONFIG_SYS_ATA_STRIDE          4                /* Width betwix addrs   */
 496#define CONFIG_DOS_PARTITION
 497
 498/* Board-specific cf regs */
 499#define CONFIG_SYS_CF_PRESENT           0x009209b0      /* CF Present PIO base  */
 500#define CONFIG_SYS_CF_POWER             0x009209c0      /* CF Power FET PIO base*/
 501#define CONFIG_SYS_CF_ATASEL            0x009209d0      /* CF ATASEL PIO base   */
 502
 503#endif
 504
 505/*------------------------------------------------------------------------
 506 * KGDB
 507 *----------------------------------------------------------------------*/
 508#if defined(CONFIG_CMD_KGDB)
 509#define CONFIG_KGDB_BAUDRATE    9600
 510#endif
 511
 512/*------------------------------------------------------------------------
 513 * MISC
 514 *----------------------------------------------------------------------*/
 515#define CONFIG_SYS_LONGHELP                         /* undef to save memory     */
 516#define CONFIG_SYS_PROMPT               "DK1C20 > " /* Monitor Command Prompt   */
 517#define CONFIG_SYS_CBSIZE               256         /* Console I/O Buffer Size  */
 518#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 519#define CONFIG_SYS_MAXARGS              16          /* max number of command args*/
 520#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
 521
 522#if     (CONFIG_SYS_SRAM_SIZE != 0)
 523#define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SRAM_BASE    /* Default load address */
 524#else
 525#undef  CONFIG_SYS_LOAD_ADDR
 526#endif
 527
 528#if     (CONFIG_SYS_SDRAM_SIZE != 0)
 529#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE   /* SDRAM til stack area */
 530#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_INIT_SP - (1024 * 1024)) /* 1MB stack */
 531#else
 532#undef  CONFIG_SYS_MEMTEST_START
 533#undef  CONFIG_SYS_MEMTEST_END
 534#endif
 535
 536/*
 537 * JFFS2 partitions
 538 *
 539 */
 540/* No command line, one static partition, whole device */
 541#undef CONFIG_CMD_MTDPARTS
 542#define CONFIG_JFFS2_DEV                "nor0"
 543#define CONFIG_JFFS2_PART_SIZE          0xFFFFFFFF
 544#define CONFIG_JFFS2_PART_OFFSET        0x00000000
 545
 546/* mtdparts command line support */
 547/*
 548#define CONFIG_CMD_MTDPARTS
 549#define MTDIDS_DEFAULT          ""
 550#define MTDPARTS_DEFAULT        ""
 551*/
 552
 553#endif  /* __CONFIG_H */
 554