uboot/include/configs/bf533-stamp.h
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   1/*
   2 * U-boot - Configuration file for BF533 STAMP board
   3 */
   4
   5#ifndef __CONFIG_BF533_STAMP_H__
   6#define __CONFIG_BF533_STAMP_H__
   7
   8#include <asm/config-pre.h>
   9
  10
  11/*
  12 * Processor Settings
  13 */
  14#define CONFIG_BFIN_CPU             bf533-0.3
  15#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
  16
  17
  18/*
  19 * Clock Settings
  20 *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  21 *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  22 */
  23/* CONFIG_CLKIN_HZ is any value in Hz                                   */
  24#define CONFIG_CLKIN_HZ                 11059200
  25/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  26/*                                                1 = CLKIN / 2         */
  27#define CONFIG_CLKIN_HALF               0
  28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  29/*                                                1 = bypass PLL        */
  30#define CONFIG_PLL_BYPASS               0
  31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  32/* Values can range from 0-63 (where 0 means 64)                        */
  33#define CONFIG_VCO_MULT                 45
  34/* CCLK_DIV controls the core clock divider                             */
  35/* Values can be 1, 2, 4, or 8 ONLY                                     */
  36#define CONFIG_CCLK_DIV                 1
  37/* SCLK_DIV controls the system clock divider                           */
  38/* Values can range from 1-15                                           */
  39#define CONFIG_SCLK_DIV                 6 /* note: 1.2 boards can go faster */
  40
  41
  42/*
  43 * Memory Settings
  44 */
  45#define CONFIG_MEM_ADD_WDTH     11
  46#define CONFIG_MEM_SIZE         128
  47
  48#define CONFIG_EBIU_SDRRC_VAL   0x268
  49#define CONFIG_EBIU_SDGCTL_VAL  0x911109
  50
  51#define CONFIG_EBIU_AMGCTL_VAL  0xFF
  52#define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3
  53#define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983
  54
  55#define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  56#define CONFIG_SYS_MALLOC_LEN   (384 * 1024)
  57
  58
  59/*
  60 * Network Settings
  61 */
  62#define ADI_CMDS_NETWORK        1
  63#define CONFIG_DRIVER_SMC91111  1
  64#define CONFIG_SMC91111_BASE    0x20300300
  65#define SMC91111_EEPROM_INIT() \
  66        do { \
  67                *pFIO_DIR |= PF1; \
  68                *pFIO_FLAG_S = PF1; \
  69                SSYNC(); \
  70        } while (0)
  71#define CONFIG_HOSTNAME         bf533-stamp
  72/* Uncomment next line to use fixed MAC address */
  73/* #define CONFIG_ETHADDR       02:80:ad:20:31:b8 */
  74
  75
  76/*
  77 * Flash Settings
  78 */
  79#define CONFIG_FLASH_CFI_DRIVER
  80#define CONFIG_SYS_FLASH_BASE           0x20000000
  81#define CONFIG_SYS_FLASH_CFI
  82#define CONFIG_SYS_FLASH_CFI_AMD_RESET
  83#define CONFIG_SYS_MAX_FLASH_BANKS      1
  84#define CONFIG_SYS_MAX_FLASH_SECT       67
  85
  86
  87/*
  88 * SPI Settings
  89 */
  90#define CONFIG_BFIN_SPI
  91#define CONFIG_ENV_SPI_MAX_HZ   30000000
  92#define CONFIG_SF_DEFAULT_SPEED 30000000
  93#define CONFIG_SPI_FLASH
  94#define CONFIG_SPI_FLASH_ATMEL
  95#define CONFIG_SPI_FLASH_SPANSION
  96#define CONFIG_SPI_FLASH_STMICRO
  97#define CONFIG_SPI_FLASH_WINBOND
  98
  99
 100/*
 101 * Env Storage Settings
 102 */
 103#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
 104#define CONFIG_ENV_IS_IN_SPI_FLASH
 105#define CONFIG_ENV_OFFSET       0x10000
 106#define CONFIG_ENV_SIZE         0x2000
 107#define CONFIG_ENV_SECT_SIZE    0x10000
 108#else
 109#define CONFIG_ENV_IS_IN_FLASH
 110#define CONFIG_ENV_OFFSET       0x4000
 111#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 112#define CONFIG_ENV_SIZE         0x2000
 113#define CONFIG_ENV_SECT_SIZE    0x2000
 114#endif
 115#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
 116#define ENV_IS_EMBEDDED
 117#else
 118#define ENV_IS_EMBEDDED_CUSTOM
 119#endif
 120#ifdef ENV_IS_EMBEDDED
 121/* WARNING - the following is hand-optimized to fit within
 122 * the sector before the environment sector. If it throws
 123 * an error during compilation remove an object here to get
 124 * it linked after the configuration sector.
 125 */
 126# define LDS_BOARD_TEXT \
 127        cpu/blackfin/traps.o            (.text .text.*); \
 128        cpu/blackfin/interrupt.o        (.text .text.*); \
 129        cpu/blackfin/serial.o           (.text .text.*); \
 130        common/dlmalloc.o               (.text .text.*); \
 131        lib_generic/crc32.o             (.text .text.*); \
 132        . = DEFINED(env_offset) ? env_offset : .; \
 133        common/env_embedded.o           (.text .text.*);
 134#endif
 135
 136
 137/*
 138 * I2C Settings
 139 * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
 140 */
 141#define CONFIG_SOFT_I2C
 142#ifdef CONFIG_SOFT_I2C
 143#define PF_SCL PF3
 144#define PF_SDA PF2
 145#define I2C_INIT \
 146        do { \
 147                *pFIO_DIR |= PF_SCL; \
 148                SSYNC(); \
 149        } while (0)
 150#define I2C_ACTIVE \
 151        do { \
 152                *pFIO_DIR |= PF_SDA; \
 153                *pFIO_INEN &= ~PF_SDA; \
 154                SSYNC(); \
 155        } while (0)
 156#define I2C_TRISTATE \
 157        do { \
 158                *pFIO_DIR &= ~PF_SDA; \
 159                *pFIO_INEN |= PF_SDA; \
 160                SSYNC(); \
 161        } while (0)
 162#define I2C_READ ((*pFIO_FLAG_D & PF_SDA) != 0)
 163#define I2C_SDA(bit) \
 164        do { \
 165                if (bit) \
 166                        *pFIO_FLAG_S = PF_SDA; \
 167                else \
 168                        *pFIO_FLAG_C = PF_SDA; \
 169                SSYNC(); \
 170        } while (0)
 171#define I2C_SCL(bit) \
 172        do { \
 173                if (bit) \
 174                        *pFIO_FLAG_S = PF_SCL; \
 175                else \
 176                        *pFIO_FLAG_C = PF_SCL; \
 177                SSYNC(); \
 178        } while (0)
 179#define I2C_DELAY               udelay(5)       /* 1/4 I2C clock duration */
 180
 181#define CONFIG_SYS_I2C_SPEED            50000
 182#define CONFIG_SYS_I2C_SLAVE            0
 183#endif
 184
 185
 186/*
 187 * Compact Flash / IDE / ATA Settings
 188 */
 189
 190/* Enabled below option for CF support */
 191/* #define CONFIG_STAMP_CF */
 192#if defined(CONFIG_STAMP_CF)
 193#define CONFIG_MISC_INIT_R
 194#define CONFIG_DOS_PARTITION    1
 195#undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 196#undef  CONFIG_IDE_LED                  /* no led for ide supported */
 197#undef  CONFIG_IDE_RESET                /* no reset for ide supported */
 198
 199#define CONFIG_SYS_IDE_MAXBUS           1
 200#define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS * 1)
 201
 202#define CONFIG_SYS_ATA_BASE_ADDR        0x20200000
 203#define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 204
 205#define CONFIG_SYS_ATA_DATA_OFFSET      0x0020  /* data I/O */
 206#define CONFIG_SYS_ATA_REG_OFFSET       0x0020  /* normal register accesses */
 207#define CONFIG_SYS_ATA_ALT_OFFSET       0x0007  /* alternate registers */
 208
 209#define CONFIG_SYS_ATA_STRIDE           2
 210
 211#undef CONFIG_EBIU_AMBCTL1_VAL
 212#define CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2
 213#endif
 214
 215
 216/*
 217 * Misc Settings
 218 */
 219#define CONFIG_RTC_BFIN
 220#define CONFIG_UART_CONSOLE     0
 221
 222/* FLASH/ETHERNET uses the same async bank */
 223#define SHARED_RESOURCES        1
 224
 225/* define to enable boot progress via leds */
 226/* #define CONFIG_SHOW_BOOT_PROGRESS */
 227
 228/* define to enable run status via led */
 229/* #define CONFIG_STATUS_LED */
 230#ifdef CONFIG_STATUS_LED
 231#define CONFIG_BOARD_SPECIFIC_LED
 232#ifndef __ASSEMBLY__
 233typedef unsigned int led_id_t;
 234void __led_init(led_id_t mask, int state);
 235void __led_set(led_id_t mask, int state);
 236void __led_toggle(led_id_t mask);
 237#endif
 238/* use LED1 to indicate booting/alive */
 239#define STATUS_LED_BOOT 0
 240#define STATUS_LED_BIT 1
 241#define STATUS_LED_STATE STATUS_LED_ON
 242#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4)
 243/* use LED2 to indicate crash */
 244#define STATUS_LED_CRASH 1
 245#define STATUS_LED_BIT1 2
 246#define STATUS_LED_STATE1 STATUS_LED_ON
 247#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
 248#endif
 249
 250/* define to enable splash screen support */
 251/* #define CONFIG_VIDEO */
 252
 253
 254/*
 255 * Pull in common ADI header for remaining command/environment setup
 256 */
 257#include <configs/bfin_adi_common.h>
 258
 259#endif
 260