uboot/include/configs/mp2usb.h
<<
>>
Prefs
   1/*
   2 * 2004-2005 Gary Jennejohn <garyj@denx.de>
   3 *
   4 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
   5 * ebenard@eukrea.com
   6 *
   7 * Configuration settings for the MP2USB board.
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 */
  27
  28#ifndef __CONFIG_H
  29#define __CONFIG_H
  30
  31/* ARM asynchronous clock */
  32#define AT91C_MAIN_CLOCK        179712000       /* from 18.432 MHz crystal (18432000 / 4 * 45) */
  33#define AT91C_MASTER_CLOCK      (AT91C_MAIN_CLOCK/3)    /* peripheral clock */
  34
  35#define AT91_SLOW_CLOCK         32768   /* slow clock */
  36
  37#define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  38#define CONFIG_AT91RM9200       1       /* It's an Atmel AT91RM9200 SoC */
  39#define CONFIG_AT91RM9200DK     1       /* on an AT91RM9200DK Board     */
  40#define CONFIG_MP2USB           1       /* on an MP2USB Board           */
  41#undef  CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
  42#define USE_920T_MMU            1
  43
  44#define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs      */
  45#define CONFIG_SETUP_MEMORY_TAGS 1
  46#define CONFIG_INITRD_TAG       1
  47
  48#define CONFIG_SYS_ATMEL_PLL_INIT_BUG   1
  49#ifndef CONFIG_SKIP_LOWLEVEL_INIT
  50#define CONFIG_SYS_USE_MAIN_OSCILLATOR  1
  51/* flash */
  52#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
  53#define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */
  54
  55/* clocks */
  56#define CONFIG_SYS_PLLAR_VAL    0x20263E04 /* 180 MHz for PCK */
  57#define CONFIG_SYS_PLLBR_VAL    0x1048bE0E /* 48 MHz (divider by 2 for USB) */
  58#define CONFIG_SYS_MCKR_VAL     0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */
  59
  60/* sdram */
  61#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
  62#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
  63#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
  64#define CONFIG_SYS_EBI_CSA_VAL  0x00000002 /* CS1=CONFIG_SYS_SDRAM */
  65#define CONFIG_SYS_SDRC_CR_VAL  0x3211295A /* set up the CONFIG_SYS_SDRAM */
  66#define CONFIG_SYS_SDRAM        0x20000000 /* address of the CONFIG_SYS_SDRAM */
  67#define CONFIG_SYS_SDRAM1       0x20000020 /* address of the CONFIG_SYS_SDRAM */
  68#define CONFIG_SYS_SDRAM_VAL    0x00000000 /* value written to CONFIG_SYS_SDRAM */
  69#define CONFIG_SYS_SDRC_MR_VAL  0x00000002 /* Precharge All */
  70#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
  71#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
  72#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
  73#define CONFIG_SYS_SDRC_TR_VAL  0x000002E0 /* Write refresh rate */
  74#else
  75#define CONFIG_SKIP_RELOCATE_UBOOT
  76#endif  /* CONFIG_SKIP_LOWLEVEL_INIT */
  77
  78/*
  79 * Size of malloc() pool
  80 */
  81#define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 128*1024)
  82#define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
  83
  84#define CONFIG_BAUDRATE         115200
  85
  86#define CONFIG_SYS_AT91C_BRGR_DIVISOR   33      /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
  87
  88/*
  89 * Hardware drivers
  90 */
  91
  92/* define one of these to choose the DBGU, USART0  or USART1 as console */
  93#define CONFIG_AT91RM9200_USART
  94#define CONFIG_DBGU
  95#undef CONFIG_USART0
  96#undef CONFIG_USART1
  97
  98#undef  CONFIG_HWFLOW                   /* don't include RTS/CTS flow control support   */
  99
 100#undef  CONFIG_MODEM_SUPPORT            /* disable modem initialization stuff */
 101
 102#define CONFIG_USB_OHCI_NEW     1
 103#define CONFIG_USB_KEYBOARD     1
 104#define CONFIG_USB_STORAGE      1
 105#define CONFIG_DOS_PARTITION    1
 106#define CONFIG_AT91C_PQFP_UHPBUG 1
 107
 108#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 109#define CONFIG_SYS_USB_OHCI_CPU_INIT            1
 110#define CONFIG_SYS_USB_OHCI_REGS_BASE           AT91_USB_HOST_BASE
 111#define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91rm9200"
 112#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 113
 114#undef CONFIG_HARD_I2C
 115
 116#ifdef CONFIG_HARD_I2C
 117#define CONFIG_SYS_I2C_SPEED            0       /* not used */
 118#define CONFIG_SYS_I2C_SLAVE            0       /* not used */
 119#define CONFIG_RTC_RS5C372A             /* RICOH I2C RTC */
 120#define CONFIG_SYS_I2C_RTC_ADDR 0x32
 121#define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 122#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 123#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 124#endif
 125/* still about 20 kB free with this defined */
 126#define CONFIG_SYS_LONGHELP
 127
 128#define CONFIG_BOOTDELAY      3
 129
 130#if !defined(CONFIG_HARD_I2C)
 131#define CONFIG_TIMESTAMP
 132#endif
 133
 134
 135/*
 136 * BOOTP options
 137 */
 138#define CONFIG_BOOTP_BOOTFILESIZE
 139#define CONFIG_BOOTP_BOOTPATH
 140#define CONFIG_BOOTP_GATEWAY
 141#define CONFIG_BOOTP_HOSTNAME
 142
 143
 144/*
 145 * Command line configuration.
 146 */
 147#include <config_cmd_default.h>
 148
 149#define CONFIG_CMD_DHCP
 150#define CONFIG_CMD_NFS
 151#define CONFIG_CMD_SNTP
 152
 153#if defined(CONFIG_HARD_I2C)
 154
 155    #define CONFIG_CMD_DATE
 156    #define CONFIG_CMD_EEPROM
 157    #define CONFIG_CMD_I2C
 158    #define CONFIG_CMD_MISC
 159
 160#else
 161
 162    #define CONFIG_CMD_CACHE
 163    #define CONFIG_CMD_USB
 164
 165    #undef CONFIG_CMD_BDI
 166    #undef CONFIG_CMD_FPGA
 167    #undef CONFIG_CMD_IMI
 168    #undef CONFIG_CMD_LOADS
 169    #undef CONFIG_CMD_MISC
 170    #undef CONFIG_CMD_SOURCE
 171
 172#endif
 173
 174
 175#define CONFIG_SYS_LONGHELP
 176
 177#define CONFIG_NR_DRAM_BANKS    1
 178#define PHYS_SDRAM              0x20000000
 179#define PHYS_SDRAM_SIZE         0x08000000      /* 128 megs */
 180
 181#define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 182#define CONFIG_SYS_MEMTEST_END          CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
 183
 184#define CONFIG_DRIVER_ETHER
 185#define CONFIG_NET_RETRY_COUNT          20
 186#undef CONFIG_AT91C_USE_RMII
 187
 188#define PHYS_FLASH_1                    0x10000000
 189#define PHYS_FLASH_SIZE                 0x1000000  /* 16 megs main flash */
 190#define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 191#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 192#define CONFIG_SYS_MAX_FLASH_BANKS              1
 193#define CONFIG_SYS_MAX_FLASH_SECT               256
 194#define CONFIG_SYS_FLASH_ERASE_TOUT             (2 * CONFIG_SYS_HZ)     /* Timeout for Flash Erase */
 195#define CONFIG_SYS_FLASH_WRITE_TOUT             (2 * CONFIG_SYS_HZ)     /* Timeout for Flash Write */
 196#define CONFIG_SYS_FLASH_LOCK_TOUT              (10*CONFIG_SYS_HZ)      /* Timeout for Flash Set Lock Bit */
 197#define CONFIG_SYS_FLASH_UNLOCK_TOUT            (10*CONFIG_SYS_HZ)      /* Timeout for Flash Clear Lock Bits */
 198#define CONFIG_SYS_FLASH_PROTECTION                             /* "Real" (hardware) sectors protection */
 199
 200#define CONFIG_ENV_IS_IN_FLASH          1
 201#define CONFIG_ENV_OFFSET                       0x20000         /* after u-boot.bin */
 202#define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE+CONFIG_ENV_OFFSET)
 203#define CONFIG_ENV_SIZE                 0x20000
 204
 205#define CONFIG_SYS_LOAD_ADDR            0x21000000  /* default load address */
 206
 207#define CONFIG_SYS_BAUDRATE_TABLE       { 115200, 57600, 38400, 19200, 9600 }
 208
 209#define CONFIG_SYS_PROMPT               "=> "           /* Monitor Command Prompt */
 210#define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size */
 211#define CONFIG_SYS_MAXARGS              32              /* max number of command args */
 212#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 213
 214#define CONFIG_SYS_STDIO_DEREGISTER           /* needs stdio_deregister */
 215
 216#define CONFIG_SYS_HZ 1000
 217#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2)      /* AT91C_TC0_CMR is implicitly set to */
 218                                                /* AT91C_TC_TIMER_DIV1_CLOCK */
 219
 220#define CONFIG_STACKSIZE        (32*1024)       /* regular stack */
 221
 222#ifdef CONFIG_USE_IRQ
 223#error CONFIG_USE_IRQ not supported
 224#endif
 225
 226#define CONFIG_SYS_DEVICE_NULLDEV        1      /* enble null device            */
 227#undef CONFIG_SILENT_CONSOLE            /* enable silent startup        */
 228
 229#define CONFIG_AUTOBOOT_KEYED
 230#define CONFIG_AUTOBOOT_PROMPT  \
 231        "Press SPACE to abort autoboot in %d seconds\n", bootdelay
 232#define CONFIG_AUTOBOOT_STOP_STR " "
 233#define CONFIG_AUTOBOOT_DELAY_STR "d"
 234
 235#define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 236
 237#endif  /* __CONFIG_H */
 238