LXR uboot/board/actux2/actux2.c

   1/*
   2 * (C) Copyright 2007
   3 * Michael Schwingen, michael@schwingen.org
   4 *
   5 * (C) Copyright 2006
   6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
   7 *
   8 * (C) Copyright 2002
   9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  10 *
  11 * (C) Copyright 2002
  12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  13 * Marius Groeger <mgroeger@sysgo.de>
  14 *
  15 * See file CREDITS for list of people who contributed to this
  16 * project.
  17 *
  18 * This program is free software; you can redistribute it and/or
  19 * modify it under the terms of the GNU General Public License as
  20 * published by the Free Software Foundation; either version 2 of
  21 * the License, or (at your option) any later version.
  22 *
  23 * This program is distributed in the hope that it will be useful,
  24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26 * GNU General Public License for more details.
  27 *
  28 * You should have received a copy of the GNU General Public License
  29 * along with this program; if not, write to the Free Software
  30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31 * MA 02111-1307 USA
  32 */
  33
  34#include <common.h>
  35#include <command.h>
  36#include <malloc.h>
  37#include <asm/arch/ixp425.h>
  38#include <asm/io.h>
  39
  40#include <miiphy.h>
  41
  42#include "actux2_hw.h"
  43
  44DECLARE_GLOBAL_DATA_PTR;
  45
  46int board_init (void)
  47{
  48        gd->bd->bi_arch_number = MACH_TYPE_ACTUX2;
  49
  50        /* adress of boot parameters */
  51        gd->bd->bi_boot_params = 0x00000100;
  52
  53        GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
  54        GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_ETHRST);
  55        GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DSR);
  56        GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DCD);
  57
  58        GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
  59        GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_ETHRST);
  60
  61        GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_DSR);
  62        GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_DCD);
  63
  64        /* Setup GPIO's for Interrupt inputs */
  65        GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_DBGINT);
  66        GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_ETHINT);
  67
  68        /* Setup GPIO's for 33MHz clock output */
  69        GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
  70        GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
  71        *IXP425_GPIO_GPCLKR = 0x011001FF;
  72
  73        /* CS1: IPAC-X */
  74        *IXP425_EXP_CS1 = 0x94d10013;
  75        /* CS5: Debug port */
  76        *IXP425_EXP_CS5 = 0x9d520003;
  77        /* CS6: HW release register */
  78        *IXP425_EXP_CS6 = 0x81860001;
  79        /* CS7: LEDs */
  80        *IXP425_EXP_CS7 = 0x80900003;
  81
  82        udelay (533);
  83        GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
  84        GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST);
  85
  86        ACTUX2_LED1 (1);
  87        ACTUX2_LED2 (0);
  88        ACTUX2_LED3 (0);
  89        ACTUX2_LED4 (0);
  90
  91        return 0;
  92}
  93
  94/*
  95 * Check Board Identity
  96 */
  97int checkboard (void)
  98{
  99        char *s = getenv ("serial#");
 100
 101        puts ("Board: AcTux-2 rev.");
 102        putc (ACTUX2_BOARDREL + 'A' - 1);
 103
 104        if (s != NULL) {
 105                puts (", serial# ");
 106                puts (s);
 107        }
 108        putc ('\n');
 109
 110        return (0);
 111}
 112
 113int dram_init (void)
 114{
 115        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 116        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 117
 118        return (0);
 119}
 120
 121/*************************************************************************
 122 * get_board_rev() - setup to pass kernel board revision information
 123 * 0 = reserved
 124 * 1 = Rev. A
 125 * 2 = Rev. B
 126 *************************************************************************/
 127u32 get_board_rev (void)
 128{
 129        return ACTUX2_BOARDREL;
 130}
 131
 132void reset_phy (void)
 133{
 134        /* init IcPlus IP175C ethernet switch to native IP175C mode */
 135        miiphy_write ("NPE0", 29, 31, 0x175C);
 136}
 137