LXR uboot/board/bf518f-ezbrd/bf518f-ezbrd.c

   1/*
   2 * U-boot - main board file
   3 *
   4 * Copyright (c) 2008-2009 Analog Devices Inc.
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <common.h>
  10#include <config.h>
  11#include <command.h>
  12#include <net.h>
  13#include <netdev.h>
  14#include <spi.h>
  15#include <asm/blackfin.h>
  16#include <asm/net.h>
  17#include <asm/mach-common/bits/otp.h>
  18
  19DECLARE_GLOBAL_DATA_PTR;
  20
  21int checkboard(void)
  22{
  23        printf("Board: ADI BF518F EZ-Board board\n");
  24        printf("       Support: http://blackfin.uclinux.org/\n");
  25        return 0;
  26}
  27
  28phys_size_t initdram(int board_type)
  29{
  30        gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
  31        gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
  32        return gd->bd->bi_memsize;
  33}
  34
  35#if defined(CONFIG_BFIN_MAC)
  36static void board_init_enetaddr(uchar *mac_addr)
  37{
  38        bool valid_mac = false;
  39
  40#if 0
  41        /* the MAC is stored in OTP memory page 0xDF */
  42        uint32_t ret;
  43        uint64_t otp_mac;
  44
  45        ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
  46        if (!(ret & OTP_MASTER_ERROR)) {
  47                uchar *otp_mac_p = (uchar *)&otp_mac;
  48
  49                for (ret = 0; ret < 6; ++ret)
  50                        mac_addr[ret] = otp_mac_p[5 - ret];
  51
  52                if (is_valid_ether_addr(mac_addr))
  53                        valid_mac = true;
  54        }
  55#endif
  56
  57        if (!valid_mac) {
  58                puts("Warning: Generating 'random' MAC address\n");
  59                bfin_gen_rand_mac(mac_addr);
  60        }
  61
  62        eth_setenv_enetaddr("ethaddr", mac_addr);
  63}
  64
  65#define KSZ_MAX_HZ    5000000
  66
  67#define KSZ_WRITE     0x02
  68#define KSZ_READ      0x03
  69
  70#define KSZ_REG_STPID 0x01      /* Register 1: Chip ID1 / Start Switch */
  71#define KSZ_REG_GC9   0x0b      /* Register 11: Global Control 9 */
  72#define KSZ_REG_P3C0  0x30      /* Register 48: Port 3 Control 0 */
  73
  74static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
  75                             uchar data, uchar result[3])
  76{
  77        unsigned char dout[3] = { dir, reg, data, };
  78        return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
  79}
  80
  81static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
  82{
  83        unsigned char din[3];
  84        return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
  85}
  86
  87static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
  88{
  89        int ret = 0;
  90        unsigned char din[3];
  91
  92        ret |= ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
  93        ret |= ksz8893m_reg_set(slave, reg, din[2] & mask);
  94
  95        return ret;
  96}
  97
  98static int ksz8893m_reset(struct spi_slave *slave)
  99{
 100        int ret = 0;
 101
 102        /* Disable STPID mode */
 103        ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
 104
 105        /* Disable VLAN tag insert on Port3 */
 106        ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
 107
 108        /* Start switch */
 109        ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
 110
 111        return ret;
 112}
 113
 114int board_eth_init(bd_t *bis)
 115{
 116        static bool switch_is_alive = false;
 117        int ret;
 118
 119        if (!switch_is_alive) {
 120                struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
 121                if (slave) {
 122                        if (!spi_claim_bus(slave)) {
 123                                ret = ksz8893m_reset(slave);
 124                                if (!ret)
 125                                        switch_is_alive = true;
 126                                spi_release_bus(slave);
 127                        }
 128                        spi_free_slave(slave);
 129                }
 130        }
 131
 132        if (switch_is_alive)
 133                return bfin_EMAC_initialize(bis);
 134        else
 135                return -1;
 136}
 137#endif
 138
 139int misc_init_r(void)
 140{
 141#ifdef CONFIG_BFIN_MAC
 142        uchar enetaddr[6];
 143        if (!eth_getenv_enetaddr("ethaddr", enetaddr))
 144                board_init_enetaddr(enetaddr);
 145#endif
 146
 147        return 0;
 148}
 149
 150int board_early_init_f(void)
 151{
 152#if !defined(CONFIG_SYS_NO_FLASH)
 153        /* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
 154        bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
 155        bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
 156
 157# if !defined(CONFIG_BFIN_SPI)
 158        /* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
 159        bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
 160        bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
 161# endif
 162#endif
 163        return 0;
 164}
 165