LXR uboot/cpu/ppc4xx/xilinx

   1/*
   2 * (C) Copyright 2008
   3 * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
   4 * This work has been supported by: QTechnology  http://qtec.com/
   5 * Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de
   6 * This program is free software: you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation, either version 2 of the License, or
   9 * (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18*/
  19#include <common.h>
  20#include <watchdog.h>
  21#include <command.h>
  22#include <asm/processor.h>
  23#include <asm/interrupt.h>
  24#include <ppc4xx.h>
  25#include <ppc_asm.tmpl>
  26#include <commproc.h>
  27#include <asm/io.h>
  28#include <asm/xilinx_irq.h>
  29
  30DECLARE_GLOBAL_DATA_PTR;
  31
  32void pic_enable(void)
  33{
  34        debug("Xilinx PIC at 0x%8x\n", intc);
  35
  36        /*
  37         * Disable all external interrupts until they are
  38         * explicitly requested.
  39         */
  40        out_be32((u32 *) IER, 0);
  41
  42        /* Acknowledge any pending interrupts just in case. */
  43        out_be32((u32 *) IAR, 0xffffffff);
  44
  45        /* Turn on the Master Enable. */
  46        out_be32((u32 *) MER, 0x3UL);
  47
  48        return;
  49}
  50
  51int xilinx_pic_irq_get(void)
  52{
  53        u32 irq;
  54        irq = in_be32((u32 *) IVR);
  55
  56        /* If no interrupt is pending then all bits of the IVR are set to 1. As
  57         * the IVR is as many bits wide as numbers of inputs are available.
  58         * Therefore, if all bits of the IVR are set to one, its content will
  59         * be bigger than XPAR_INTC_MAX_NUM_INTR_INPUTS.
  60         */
  61        if (irq >= XPAR_INTC_MAX_NUM_INTR_INPUTS)
  62                irq = -1;       /* report no pending interrupt. */
  63
  64        debug("get_irq: %d\n", irq);
  65        return (irq);
  66}
  67
  68void pic_irq_enable(unsigned int irq)
  69{
  70        u32 mask = IRQ_MASK(irq);
  71        debug("enable: %d\n", irq);
  72        out_be32((u32 *) SIE, mask);
  73}
  74
  75void pic_irq_disable(unsigned int irq)
  76{
  77        u32 mask = IRQ_MASK(irq);
  78        debug("disable: %d\n", irq);
  79        out_be32((u32 *) CIE, mask);
  80}
  81
  82void pic_irq_ack(unsigned int irq)
  83{
  84        u32 mask = IRQ_MASK(irq);
  85        debug("ack: %d\n", irq);
  86        out_be32((u32 *) IAR, mask);
  87}
  88
  89void external_interrupt(struct pt_regs *regs)
  90{
  91        int irq;
  92
  93        irq = xilinx_pic_irq_get();
  94        if (irq < 0)
  95                return;
  96
  97        interrupt_run_handler(irq);
  98
  99        return;
 100}
 101