1/* 2 * (C) Copyright 2002 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/* 25 * 26 * Configuration settings for the AmigaOneG3SE board. 27 * 28 */ 29 30/* ------------------------------------------------------------------------- */ 31 32/* 33 * board/config.h - configuration options, board specific 34 */ 35 36#ifndef __CONFIG_H 37#define __CONFIG_H 38 39/* 40 * High Level Configuration Options 41 * (easy to change) 42 */ 43 44#define CONFIG_AMIGAONEG3SE 1 45 46#define CONFIG_BOARD_EARLY_INIT_F 1 47#define CONFIG_MISC_INIT_R 1 48 49#define CONFIG_VERY_BIG_RAM 1 50 51#define CONFIG_CONS_INDEX 1 52#define CONFIG_BAUDRATE 9600 53#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 54 55#undef CONFIG_CLOCKS_IN_MHZ /* clocks passed to Linux in Hz */ 56 57#define CONFIG_BOOTARGS "root=/dev/ram rw ramdisk_size=4096" 58 59/* 60 * BOOTP options 61 */ 62#define CONFIG_BOOTP_SUBNETMASK 63#define CONFIG_BOOTP_GATEWAY 64#define CONFIG_BOOTP_HOSTNAME 65#define CONFIG_BOOTP_BOOTPATH 66#define CONFIG_BOOTP_BOOTFILESIZE 67 68 69#define CONFIG_MAC_PARTITION 70#define CONFIG_DOS_PARTITION 71#define CONFIG_AMIGA_PARTITION 72 73 74/* 75 * Command line configuration. 76 */ 77#include <config_cmd_default.h> 78 79#define CONFIG_CMD_ASKENV 80#define CONFIG_CMD_BSP 81#define CONFIG_CMD_DATE 82#define CONFIG_CMD_DHCP 83#define CONFIG_CMD_ELF 84#define CONFIG_CMD_NET 85#define CONFIG_CMD_IDE 86#define CONFIG_CMD_FDC 87#define CONFIG_CMD_CACHE 88#define CONFIG_CMD_CONSOLE 89#define CONFIG_CMD_USB 90#define CONFIG_CMD_BSP 91#define CONFIG_CMD_PCI 92 93 94#define CONFIG_PCI 1 95/* #define CONFIG_PCI_SCAN_SHOW 1 */ 96#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ 97 98#define atoi(x) simple_strtoul(x,NULL,10) 99 100/* 101 * Miscellaneous configurable options 102 */ 103#define CONFIG_SYS_LONGHELP /* undef to save memory */ 104#define CONFIG_SYS_PROMPT "] " /* Monitor Command Prompt */ 105 106#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ 107/* #undef CONFIG_SYS_HUSH_PARSER */ 108#ifdef CONFIG_SYS_HUSH_PARSER 109#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 110#endif 111#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 112 113/* Print Buffer Size 114 */ 115#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 116 117#define CONFIG_SYS_MAXARGS 64 /* max number of command args */ 118#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 119#define CONFIG_SYS_LOAD_ADDR 0x00500000 /* Default load address */ 120 121/*----------------------------------------------------------------------- 122 * Start addresses for the final memory configuration 123 * (Set up by the startup code) 124 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 125 */ 126#define CONFIG_SYS_SDRAM_BASE 0x00000000 127#define CONFIG_SYS_FLASH_BASE 0xFFF00000 128#define CONFIG_SYS_FLASH_MAX_SIZE 0x00080000 129/* Maximum amount of RAM. 130 */ 131#define CONFIG_SYS_MAX_RAM_SIZE 0x80000000 /* 2G */ 132 133#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 134 135#define CONFIG_SYS_MONITOR_BASE TEXT_BASE 136 137#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* Reserve 512 kB for Monitor */ 138#define CONFIG_SYS_MALLOC_LEN (2500 << 10) /* Reserve 128 kB for malloc() */ 139 140#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_SDRAM_BASE && \ 141 CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE 142#define CONFIG_SYS_RAMBOOT 143#else 144#undef CONFIG_SYS_RAMBOOT 145#endif 146 147#define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */ 148#define CONFIG_SYS_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */ 149 150/*----------------------------------------------------------------------- 151 * Definitions for initial stack pointer and data area 152 */ 153 154/* Size in bytes reserved for initial data 155 */ 156/* HJF: used to be 0x400000 */ 157#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 158#define CONFIG_SYS_INIT_RAM_END 0x8000 159#define CONFIG_SYS_GBL_DATA_SIZE 128 160#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 161#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 162 163#define CONFIG_SYS_INIT_RAM_LOCK 164 165/* 166 * Temporary buffer for serial data until the real serial driver 167 * is initialised (memtest will destroy this buffer) 168 */ 169#define CONFIG_SYS_SCONSOLE_ADDR CONFIG_SYS_INIT_RAM_ADDR 170#define CONFIG_SYS_SCONSOLE_SIZE 0x0002000 171 172/* SDRAM 0 - 256MB 173 */ 174 175/*HJF: #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) 176#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_4M | BATU_VS | BATU_VP) 177#define CONFIG_SYS_DBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) 178#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U*/ 179 180#define CONFIG_SYS_DBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) 181#define CONFIG_SYS_DBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) 182#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) 183#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) 184/* PCI Range 185 */ 186#define CONFIG_SYS_DBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 187#define CONFIG_SYS_DBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 188#define CONFIG_SYS_IBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 189#define CONFIG_SYS_IBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 190/* HJF: 191#define CONFIG_SYS_IBAT1L ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR) | BATL_PP_RW) 192#define CONFIG_SYS_IBAT1U ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR) | BATU_BL_256M | BATU_VS | BATU_VP) 193#define CONFIG_SYS_DBAT1L ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW ) 194#define CONFIG_SYS_DBAT1U ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR + 0x20000) | BATU_BL_256M | BATU_VS | BATU_VP) 195*/ 196 197/* Init RAM in the CPU DCache (no backing memory) 198 */ 199#define CONFIG_SYS_DBAT2L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE) 200#define CONFIG_SYS_DBAT2U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) 201/* This used to be commented out */ 202#define CONFIG_SYS_IBAT2L CONFIG_SYS_DBAT2L 203/* This here too */ 204#define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U 205 206 207/* I/O and PCI memory at 0xf0000000 208 */ 209#define CONFIG_SYS_DBAT3L (0xf0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 210#define CONFIG_SYS_DBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP) 211 212#define CONFIG_SYS_IBAT3L (0xf0000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 213#define CONFIG_SYS_IBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP) 214 215/* 216 * Low Level Configuration Settings 217 * (address mappings, register initial values, etc.) 218 */ 219#define CONFIG_SYS_HZ 1000 220#define CONFIG_SYS_BUS_HZ 133000000 /* bus speed - 100 mhz */ 221#define CONFIG_SYS_CPU_CLK 133000000 222#define CONFIG_SYS_BUS_CLK 133000000 223 224/* 225 * For booting Linux, the board info and command line data 226 * have to be in the first 8 MB of memory, since this is 227 * the maximum mapped by the Linux kernel during initialization. 228 */ 229#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 230 231/*----------------------------------------------------------------------- 232 * FLASH organization 233 */ 234#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */ 235#define CONFIG_SYS_MAX_FLASH_SECT 8 /* Max number of sectors in one bank */ 236 237#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 238#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */ 239 240/* 241 * Environment is stored in NVRAM. 242 */ 243#define CONFIG_ENV_IS_IN_NVRAM 1 244#define CONFIG_ENV_ADDR 0xFD0E0000 /* This should be 0xFD0E0000, but we skip bytes to 245 * protect softex's settings for now. 246 * Original 768 bytes where not enough. 247 */ 248#define CONFIG_ENV_SIZE 0x8000 /* Size of the Environment. See comment above */ 249 250#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 /* stdin/stdout/stderr are in environment */ 251#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1 252#define CONFIG_ENV_OVERWRITE 1 253 254/*----------------------------------------------------------------------- 255 * Cache Configuration 256 */ 257#define CONFIG_SYS_CACHELINE_SIZE 32 258#if defined(CONFIG_CMD_KGDB) 259# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ 260#endif 261 262/* 263 * L2 cache 264 */ 265#define CONFIG_SYS_L2 266#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \ 267 L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) 268#define L2_ENABLE (L2_INIT | L2CR_L2E) 269 270/* 271 * Internal Definitions 272 * 273 * Boot Flags 274 */ 275#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ 276#define BOOTFLAG_WARM 0x02 /* Software reboot */ 277 278 279/*----------------------------------------------------------------------- 280 * IDE ATAPI Configuration 281 */ 282 283#define CONFIG_ATAPI 1 284#define CONFIG_SYS_IDE_MAXBUS 2 285#define CONFIG_SYS_IDE_MAXDEVICE 4 286#define CONFIG_ISO_PARTITION 1 287 288#define CONFIG_SYS_ATA_BASE_ADDR 0xFE000000 /* was: via_get_base_addr() */ 289#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1F0 290#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 291 292#define CONFIG_SYS_ATA_REG_OFFSET 0 293#define CONFIG_SYS_ATA_DATA_OFFSET 0 294#define CONFIG_SYS_ATA_ALT_OFFSET 0x0200 295 296/*----------------------------------------------------------------------- 297 * Disk-On-Chip configuration 298 */ 299 300#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ 301 302#define CONFIG_SYS_DOC_SUPPORT_2000 303#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM 304 305/*----------------------------------------------------------------------- 306 RTC 307*/ 308#define CONFIG_RTC_MC146818 309 310/*----------------------------------------------------------------------- 311 * NS16550 Configuration 312 */ 313 314#define CONFIG_SYS_NS16550 315 316#define CONFIG_SYS_NS16550_COM1 0xFE0003F8 317#define CONFIG_SYS_NS16550_COM2 0xFE0002F8 318 319#define CONFIG_SYS_NS16550_REG_SIZE 1 320 321/* base address for ISA I/O 322 */ 323#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xFE000000 324 325/* ISA Interrupt stuff (taken from JWL) */ 326 327#define ISA_INT1_OCW1 0x21 328#define ISA_INT2_OCW1 0xA1 329#define ISA_INT1_OCW2 0x20 330#define ISA_INT2_OCW2 0xA0 331#define ISA_INT1_OCW3 0x20 332#define ISA_INT2_OCW3 0xA0 333 334#define ISA_INT1_ICW1 0x20 335#define ISA_INT2_ICW1 0xA0 336#define ISA_INT1_ICW2 0x21 337#define ISA_INT2_ICW2 0xA1 338#define ISA_INT1_ICW3 0x21 339#define ISA_INT2_ICW3 0xA1 340#define ISA_INT1_ICW4 0x21 341#define ISA_INT2_ICW4 0xA1 342 343 344/* 345 * misc 346 */ 347 348#define CONFIG_NET_MULTI 349#define CONFIG_SYS_BOARD_ASM_INIT 350#define CONFIG_LAST_STAGE_INIT 351 352/* #define CONFIG_ETHADDR 00:09:D2:10:00:76 */ 353/* #define CONFIG_IPADDR 192.168.0.2 */ 354/* #define CONFIG_NETMASK 255.255.255.240 */ 355/* #define CONFIG_GATEWAYIP 192.168.0.3 */ 356 357#define CONFIG_3COM 358/* #define CONFIG_BOOTP_RANDOM_DELAY */ 359 360/* 361 * USB configuration 362 */ 363#define CONFIG_USB_UHCI 1 364#define CONFIG_USB_STORAGE 1 365#define CONFIG_USB_KEYBOARD 1 366#define CONFIG_SYS_STDIO_DEREGISTER 1 /* needed by CONFIG_USB_KEYBOARD */ 367 368/* 369 * Autoboot stuff 370 */ 371#define CONFIG_BOOTDELAY 5 /* Boot automatically after five seconds */ 372#define CONFIG_PREBOOT "" 373#define CONFIG_BOOTCOMMAND "fdcboot; diskboot" 374#define CONFIG_MENUPROMPT \ 375 "Press any key to interrupt autoboot: %2d ", bootdelay 376#define CONFIG_MENUKEY ' ' 377#define CONFIG_MENUCOMMAND "menu" 378/* #define CONFIG_AUTOBOOT_KEYED */ 379 380/* 381 * Extra ENV stuff 382 */ 383#define CONFIG_EXTRA_ENV_SETTINGS \ 384 "stdout=vga\0" \ 385 "stdin=ps2kbd\0" \ 386 "ide_doreset=on\0" \ 387 "ide_maxbus=2\0" \ 388 "ide_cd_timeout=30\0" \ 389 "menucmd=menu\0" \ 390 "pci_irqa=9\0" \ 391 "pci_irqa_select=edge\0" \ 392 "pci_irqb=10\0" \ 393 "pci_irqb_select=edge\0" \ 394 "pci_irqc=11\0" \ 395 "pci_irqc_select=edge\0" \ 396 "pci_irqd=7\0" \ 397 "pci_irqd_select=edge\0" 398 399 400/* #define CONFIG_MII 1 */ 401/* #define CONFIG_BITBANGMII 1 */ 402 403 404#endif /* __CONFIG_H */ 405