uboot/include/configs/cm-bf537e.h
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   1/*
   2 * U-boot - Configuration file for CM-BF537E board
   3 */
   4
   5#ifndef __CONFIG_CM_BF537E_H__
   6#define __CONFIG_CM_BF537E_H__
   7
   8#include <asm/config-pre.h>
   9
  10
  11/*
  12 * Processor Settings
  13 */
  14#define CONFIG_BFIN_CPU             bf537-0.2
  15#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
  16
  17
  18/*
  19 * Clock Settings
  20 *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  21 *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  22 */
  23/* CONFIG_CLKIN_HZ is any value in Hz                                   */
  24#define CONFIG_CLKIN_HZ                 25000000
  25/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  26/*                                                1 = CLKIN / 2         */
  27#define CONFIG_CLKIN_HALF               0
  28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  29/*                                                1 = bypass PLL        */
  30#define CONFIG_PLL_BYPASS               0
  31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  32/* Values can range from 0-63 (where 0 means 64)                        */
  33#define CONFIG_VCO_MULT                 21
  34/* CCLK_DIV controls the core clock divider                             */
  35/* Values can be 1, 2, 4, or 8 ONLY                                     */
  36#define CONFIG_CCLK_DIV                 1
  37/* SCLK_DIV controls the system clock divider                           */
  38/* Values can range from 1-15                                           */
  39#define CONFIG_SCLK_DIV                 4
  40
  41
  42/*
  43 * Memory Settings
  44 */
  45#define CONFIG_MEM_ADD_WDTH     9
  46#define CONFIG_MEM_SIZE         32
  47
  48#define CONFIG_EBIU_SDRRC_VAL   0x3f8
  49#define CONFIG_EBIU_SDGCTL_VAL  0x9111cd
  50
  51#define CONFIG_EBIU_AMGCTL_VAL  (AMBEN_ALL)
  52#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
  53#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
  54
  55#define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  56#define CONFIG_SYS_MALLOC_LEN   (128 * 1024)
  57
  58
  59/*
  60 * Network Settings
  61 */
  62#ifndef __ADSPBF534__
  63#define ADI_CMDS_NETWORK        1
  64#define CONFIG_BFIN_MAC
  65#define CONFIG_NETCONSOLE       1
  66#define CONFIG_NET_MULTI        1
  67#endif
  68#define CONFIG_HOSTNAME         cm-bf537e
  69/* Uncomment next line to use fixed MAC address */
  70/* #define CONFIG_ETHADDR       02:80:ad:20:31:e8 */
  71
  72
  73/*
  74 * Flash Settings
  75 */
  76#define CONFIG_FLASH_CFI_DRIVER
  77#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  78#define CONFIG_SYS_FLASH_BASE           0x20000000
  79#define CONFIG_SYS_FLASH_CFI
  80#define CONFIG_SYS_FLASH_PROTECTION
  81#define CONFIG_SYS_MAX_FLASH_BANKS      1
  82#define CONFIG_SYS_MAX_FLASH_SECT       35
  83
  84
  85/*
  86 * Env Storage Settings
  87 */
  88#define CONFIG_ENV_IS_IN_FLASH  1
  89#define CONFIG_ENV_OFFSET       0x4000
  90#define CONFIG_ENV_SIZE         0x2000
  91#define CONFIG_ENV_SECT_SIZE    0x20000
  92#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
  93#define ENV_IS_EMBEDDED
  94#else
  95#define ENV_IS_EMBEDDED_CUSTOM
  96#endif
  97#ifdef ENV_IS_EMBEDDED
  98/* WARNING - the following is hand-optimized to fit within
  99 * the sector before the environment sector. If it throws
 100 * an error during compilation remove an object here to get
 101 * it linked after the configuration sector.
 102 */
 103# define LDS_BOARD_TEXT \
 104        cpu/blackfin/traps.o            (.text .text.*); \
 105        cpu/blackfin/interrupt.o        (.text .text.*); \
 106        cpu/blackfin/serial.o           (.text .text.*); \
 107        common/dlmalloc.o               (.text .text.*); \
 108        lib_generic/crc32.o             (.text .text.*); \
 109        . = DEFINED(env_offset) ? env_offset : .; \
 110        common/env_embedded.o           (.text .text.*);
 111#endif
 112
 113
 114/*
 115 * I2C Settings
 116 */
 117#define CONFIG_BFIN_TWI_I2C     1
 118#define CONFIG_HARD_I2C         1
 119#define CONFIG_SYS_I2C_SPEED    50000
 120#define CONFIG_SYS_I2C_SLAVE    0
 121
 122
 123/*
 124 * Misc Settings
 125 */
 126#define CONFIG_BAUDRATE         115200
 127#define CONFIG_MISC_INIT_R
 128#define CONFIG_RTC_BFIN
 129#define CONFIG_UART_CONSOLE     0
 130
 131
 132/*
 133 * Pull in common ADI header for remaining command/environment setup
 134 */
 135#include <configs/bfin_adi_common.h>
 136
 137#endif
 138