1/* 2 * (C) Copyright 2004 3 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#define SDRAM_DDR 0 /* is SDR */ 25 26#if defined(CONFIG_MPC5200) 27/* Settings for XLB = 132 MHz */ 28#define SDRAM_MODE 0x00CD0000 29/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */ 30#define SDRAM_CONTROL 0x504F0000 31#define SDRAM_CONFIG1 0xD2322800 32/* #define SDRAM_CONFIG1 0xD2222800 */ /* CAS latency 2 */ 33/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */ 34#define SDRAM_CONFIG2 0x8AD70000 35/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */ 36 37#elif defined(CONFIG_MGT5100) 38/* Settings for XLB = 66 MHz */ 39#define SDRAM_MODE 0x008D0000 40#define SDRAM_CONTROL 0x504F0000 41#define SDRAM_CONFIG1 0xC2222600 42#define SDRAM_CONFIG2 0x88B70004 43#define SDRAM_ADDRSEL 0x02000000 44 45#else 46#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined 47#endif 48