LXR uboot/board/davinci/dm355evm/dm355evm.c

   1/*
   2 * Copyright (C) 2009 David Brownell
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17 */
  18
  19#include <common.h>
  20#include <nand.h>
  21#include <asm/io.h>
  22#include <asm/arch/hardware.h>
  23#include <asm/arch/emif_defs.h>
  24#include <asm/arch/nand_defs.h>
  25#include "../common/misc.h"
  26#include <net.h>
  27#include <netdev.h>
  28
  29DECLARE_GLOBAL_DATA_PTR;
  30
  31/*
  32 * With the DM355 EVM, u-boot is *always* a third stage loader,
  33 * unless a JTAG debugger handles the first two stages:
  34 *
  35 *   - 1st stage is ROM Boot Loader (RBL), which searches for a
  36 *     second stage loader in one of three places based on SW7:
  37 *     NAND (with MMC/SD fallback), MMC/SD, or UART.
  38 *
  39 *   - 2nd stage is User Boot Loader (UBL), using at most 30KB
  40 *     of on-chip SRAM, responsible for lowlevel init, and for
  41 *     loading the third stage loader into DRAM.
  42 *
  43 *   - 3rd stage, that's us!
  44 */
  45
  46int board_init(void)
  47{
  48        gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM;
  49        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  50
  51        /* We expect the UBL to have handled "lowlevel init", which
  52         * involves setting up at least:
  53         *  - clocks
  54         *      + PLL1 (for ARM and peripherals) and PLL2 (for DDR)
  55         *      + clock divisors for those PLLs
  56         *      + LPSC_DDR module enabled
  57         *      + LPSC_TIMER0 module (still) enabled
  58         *  - EMIF
  59         *      + DDR init and timings
  60         *      + AEMIF timings (for NAND and DM9000)
  61         *  - pinmux
  62         *
  63         * Some of that is repeated here, mostly as a precaution.
  64         */
  65
  66        /* AEMIF:  Some "address" lines are available as GPIOs.  A3..A13
  67         * could be too if we used A12 as a GPIO during NAND chipselect
  68         * (and Linux did too), letting us control the LED on A7/GPIO61.
  69         */
  70        REG(PINMUX2) = 0x0c08;
  71
  72        /* UART0 may still be in SyncReset if we didn't boot from UART */
  73        davinci_enable_uart0();
  74
  75        /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */
  76        lpsc_on(DAVINCI_LPSC_TPCC);
  77        lpsc_on(DAVINCI_LPSC_TPTC0);
  78        lpsc_on(DAVINCI_LPSC_TPTC1);
  79
  80        return 0;
  81}
  82
  83#ifdef CONFIG_DRIVER_DM9000
  84int board_eth_init(bd_t *bis)
  85{
  86        return dm9000_initialize(bis);
  87}
  88#endif
  89
  90#ifdef CONFIG_NAND_DAVINCI
  91
  92static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip)
  93{
  94        struct nand_chip        *this = mtd->priv;
  95        unsigned long           wbase = (unsigned long) this->IO_ADDR_W;
  96        unsigned long           rbase = (unsigned long) this->IO_ADDR_R;
  97
  98        if (chip == 1) {
  99                __set_bit(14, &wbase);
 100                __set_bit(14, &rbase);
 101        } else {
 102                __clear_bit(14, &wbase);
 103                __clear_bit(14, &rbase);
 104        }
 105        this->IO_ADDR_W = (void *)wbase;
 106        this->IO_ADDR_R = (void *)rbase;
 107}
 108
 109int board_nand_init(struct nand_chip *nand)
 110{
 111        davinci_nand_init(nand);
 112        nand->select_chip = nand_dm355evm_select_chip;
 113        return 0;
 114}
 115
 116#endif
 117