1/* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian.pop@leadtechdesign.com> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25#include <common.h> 26#include <asm/arch/hardware.h> 27#include <asm/arch/at91_pit.h> 28#include <asm/arch/at91_pmc.h> 29#include <asm/arch/clk.h> 30#include <asm/arch/io.h> 31#include <div64.h> 32 33/* 34 * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by 35 * setting the 20 bit counter period to its maximum (0xfffff). 36 */ 37#define TIMER_LOAD_VAL 0xfffff 38#define READ_RESET_TIMER at91_sys_read(AT91_PIT_PIVR) 39#define READ_TIMER at91_sys_read(AT91_PIT_PIIR) 40 41static ulong timestamp; 42static ulong lastinc; 43static ulong timer_freq; 44 45static inline unsigned long long tick_to_time(unsigned long long tick) 46{ 47 tick *= CONFIG_SYS_HZ; 48 do_div(tick, timer_freq); 49 50 return tick; 51} 52 53static inline unsigned long long usec_to_tick(unsigned long long usec) 54{ 55 usec *= timer_freq; 56 do_div(usec, 1000000); 57 58 return usec; 59} 60 61/* nothing really to do with interrupts, just starts up a counter. */ 62int timer_init(void) 63{ 64 /* 65 * Enable PITC Clock 66 * The clock is already enabled for system controller in boot 67 */ 68 at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); 69 70 /* Enable PITC */ 71 at91_sys_write(AT91_PIT_MR, TIMER_LOAD_VAL | AT91_PIT_PITEN); 72 73 reset_timer_masked(); 74 75 timer_freq = get_mck_clk_rate() >> 4; 76 77 return 0; 78} 79 80/* 81 * timer without interrupts 82 */ 83unsigned long long get_ticks(void) 84{ 85 ulong now = READ_TIMER; 86 87 if (now >= lastinc) /* normal mode (non roll) */ 88 /* move stamp forward with absolut diff ticks */ 89 timestamp += (now - lastinc); 90 else /* we have rollover of incrementer */ 91 timestamp += (0xFFFFFFFF - lastinc) + now; 92 lastinc = now; 93 return timestamp; 94} 95 96void reset_timer_masked(void) 97{ 98 /* reset time */ 99 lastinc = READ_TIMER; /* capture current incrementer value time */ 100 timestamp = 0; /* start "advancing" time stamp from 0 */ 101} 102 103ulong get_timer_masked(void) 104{ 105 return tick_to_time(get_ticks()); 106} 107 108void udelay(unsigned long usec) 109{ 110 unsigned long long tmp; 111 ulong tmo; 112 113 tmo = usec_to_tick(usec); 114 tmp = get_ticks() + tmo; /* get current timestamp */ 115 116 while (get_ticks() < tmp) /* loop till event */ 117 /*NOP*/; 118} 119 120void reset_timer(void) 121{ 122 reset_timer_masked(); 123} 124 125ulong get_timer(ulong base) 126{ 127 return get_timer_masked () - base; 128} 129 130/* 131 * This function is derived from PowerPC code (timebase clock frequency). 132 * On ARM it returns the number of timer ticks per second. 133 */ 134ulong get_tbclk(void) 135{ 136 ulong tbclk; 137 138 tbclk = CONFIG_SYS_HZ; 139 return tbclk; 140} 141