1/* 2 * (C) Copyright 2001 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/* 25 * board/config.h - configuration options, board specific 26 */ 27 28#ifndef __CONFIG_H 29#define __CONFIG_H 30 31/*********************************************************** 32 * High Level Configuration Options 33 * (easy to change) 34 ***********************************************************/ 35#define CONFIG_405GP 1 /* This is a PPC405 CPU */ 36#define CONFIG_4xx 1 /* ...member of PPC4xx family */ 37#define CONFIG_PIP405 1 /* ...on a PIP405 board */ 38/*********************************************************** 39 * Clock 40 ***********************************************************/ 41#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ 42 43 44/* 45 * BOOTP options 46 */ 47#define CONFIG_BOOTP_BOOTFILESIZE 48#define CONFIG_BOOTP_BOOTPATH 49#define CONFIG_BOOTP_GATEWAY 50#define CONFIG_BOOTP_HOSTNAME 51 52 53/* 54 * Command line configuration. 55 */ 56#include <config_cmd_default.h> 57 58#define CONFIG_CMD_IDE 59#define CONFIG_CMD_DHCP 60#define CONFIG_CMD_PCI 61#define CONFIG_CMD_CACHE 62#define CONFIG_CMD_IRQ 63#define CONFIG_CMD_EEPROM 64#define CONFIG_CMD_I2C 65#define CONFIG_CMD_REGINFO 66#define CONFIG_CMD_FDC 67#define CONFIG_CMD_SCSI 68#define CONFIG_CMD_FAT 69#define CONFIG_CMD_DATE 70#define CONFIG_CMD_ELF 71#define CONFIG_CMD_USB 72#define CONFIG_CMD_MII 73#define CONFIG_CMD_SDRAM 74#define CONFIG_CMD_PING 75#define CONFIG_CMD_SAVES 76#define CONFIG_CMD_BSP 77 78#define CONFIG_SYS_HUSH_PARSER 79#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 80/************************************************************** 81 * I2C Stuff: 82 * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address 83 * 0x53. 84 * Caution: on the same bus is the SPD (Serial Presens Detect 85 * EEPROM of the SDRAM 86 * The Atmel EEPROM uses 16Bit addressing. 87 ***************************************************************/ 88#define CONFIG_HARD_I2C /* I2c with hardware support */ 89#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ 90#define CONFIG_SYS_I2C_SLAVE 0x7F 91 92#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 93#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 94#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ 95#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ 96#define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */ 97 98#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 99#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ 100 /* 64 byte page write mode using*/ 101 /* last 6 bits of the address */ 102#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ 103 104 105/*************************************************************** 106 * Definitions for Serial Presence Detect EEPROM address 107 * (to get SDRAM settings) 108 ***************************************************************/ 109#define SPD_EEPROM_ADDRESS 0x50 110 111#define CONFIG_BOARD_EARLY_INIT_F 112/************************************************************** 113 * Environment definitions 114 **************************************************************/ 115#define CONFIG_BAUDRATE 9600 /* STD Baudrate */ 116 117 118#define CONFIG_BOOTDELAY 5 119/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ 120/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ 121#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ 122 123 124#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ 125#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ 126 127#define CONFIG_IPADDR 10.0.0.100 128#define CONFIG_SERVERIP 10.0.0.1 129#define CONFIG_PREBOOT 130/*************************************************************** 131 * defines if the console is stored in the environment 132 ***************************************************************/ 133#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* stdin, stdout and stderr are in evironment */ 134/*************************************************************** 135 * defines if an overwrite_console function exists 136 *************************************************************/ 137#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 138#define CONFIG_SYS_CONSOLE_INFO_QUIET 139/*************************************************************** 140 * defines if the overwrite_console should be stored in the 141 * environment 142 **************************************************************/ 143#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 144 145/************************************************************** 146 * loads config 147 *************************************************************/ 148#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 149#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 150 151#define CONFIG_MISC_INIT_R 152/*********************************************************** 153 * Miscellaneous configurable options 154 **********************************************************/ 155#define CONFIG_SYS_LONGHELP /* undef to save memory */ 156#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 157#if defined(CONFIG_CMD_KGDB) 158#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 159#else 160#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 161#endif 162#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 163#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 164#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 165 166#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ 167#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ 168 169#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ 170#define CONFIG_SYS_BASE_BAUD 691200 171 172/* The following table includes the supported baudrates */ 173#define CONFIG_SYS_BAUDRATE_TABLE \ 174 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ 175 57600, 115200, 230400, 460800, 921600 } 176 177#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ 178#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ 179 180#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ 181 182/*----------------------------------------------------------------------- 183 * PCI stuff 184 *----------------------------------------------------------------------- 185 */ 186#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ 187#define PCI_HOST_FORCE 1 /* configure as pci host */ 188#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ 189 190#define CONFIG_PCI /* include pci support */ 191#define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ 192#define CONFIG_PCI_PNP /* pci plug-and-play */ 193 /* resource configuration */ 194#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ 195#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ 196#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ 197#define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ 198#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ 199#define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ 200#define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ 201#define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ 202 203/*----------------------------------------------------------------------- 204 * Start addresses for the final memory configuration 205 * (Set up by the startup code) 206 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 207 */ 208#define CONFIG_SYS_SDRAM_BASE 0x00000000 209#define CONFIG_SYS_FLASH_BASE 0xFFF80000 210#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 211#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ 212#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */ 213 214/* 215 * For booting Linux, the board info and command line data 216 * have to be in the first 8 MB of memory, since this is 217 * the maximum mapped by the Linux kernel during initialization. 218 */ 219#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 220/*----------------------------------------------------------------------- 221 * FLASH organization 222 */ 223#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 224#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 225 226#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 227#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 228 229/* 230 * Init Memory Controller: 231 */ 232#define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */ 233#define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */ 234/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ 235#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ 236 237#define CONFIG_BOARD_EARLY_INIT_F 238 239/* Configuration Port location */ 240#define CONFIG_PORT_ADDR 0xF4000000 241#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 242 243 244/*----------------------------------------------------------------------- 245 * Definitions for initial stack pointer and data area (in On Chip SRAM) 246 */ 247#define CONFIG_SYS_TEMP_STACK_OCM 1 248#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 249#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 250#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ 251#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of On Chip SRAM */ 252#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ 253#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 254#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 255 256/* 257 * Internal Definitions 258 * 259 * Boot Flags 260 */ 261#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ 262#define BOOTFLAG_WARM 0x02 /* Software reboot */ 263 264 265/*********************************************************************** 266 * External peripheral base address 267 ***********************************************************************/ 268#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000 269 270/*********************************************************************** 271 * Last Stage Init 272 ***********************************************************************/ 273#define CONFIG_LAST_STAGE_INIT 274/************************************************************ 275 * Ethernet Stuff 276 ***********************************************************/ 277#define CONFIG_PPC4xx_EMAC 278#define CONFIG_MII 1 /* MII PHY management */ 279#define CONFIG_PHY_ADDR 1 /* PHY address */ 280#define CONFIG_NET_MULTI 281/************************************************************ 282 * RTC 283 ***********************************************************/ 284#define CONFIG_RTC_MC146818 285#undef CONFIG_WATCHDOG /* watchdog disabled */ 286 287/************************************************************ 288 * IDE/ATA stuff 289 ************************************************************/ 290#define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ 291#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ 292 293#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */ 294#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ 295#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ 296#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ 297#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ 298#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ 299 300#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ 301#undef CONFIG_IDE_LED /* no led for ide supported */ 302#define CONFIG_IDE_RESET /* reset for ide supported... */ 303#define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */ 304#define CONFIG_SUPPORT_VFAT 305 306/************************************************************ 307 * ATAPI support (experimental) 308 ************************************************************/ 309#define CONFIG_ATAPI /* enable ATAPI Support */ 310 311/************************************************************ 312 * SCSI support (experimental) only SYM53C8xx supported 313 ************************************************************/ 314#define CONFIG_SCSI_SYM53C8XX 315#define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */ 316#define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */ 317#define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */ 318#define CONFIG_SYS_SCSI_SPIN_UP_TIME 2 319 320/************************************************************ 321 * Disk-On-Chip configuration 322 ************************************************************/ 323#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ 324#define CONFIG_SYS_DOC_SHORT_TIMEOUT 325#define CONFIG_SYS_DOC_SUPPORT_2000 326#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM 327 328/************************************************************ 329 * DISK Partition support 330 ************************************************************/ 331#define CONFIG_DOS_PARTITION 332#define CONFIG_MAC_PARTITION 333#define CONFIG_ISO_PARTITION /* Experimental */ 334 335/************************************************************ 336 * Keyboard support 337 ************************************************************/ 338#define CONFIG_ISA_KEYBOARD 339 340/************************************************************ 341 * Video support 342 ************************************************************/ 343#define CONFIG_VIDEO /*To enable video controller support */ 344#define CONFIG_VIDEO_CT69000 345#define CONFIG_CFB_CONSOLE 346#define CONFIG_VIDEO_LOGO 347#define CONFIG_CONSOLE_EXTRA_INFO 348#define CONFIG_VGA_AS_SINGLE_DEVICE 349#define CONFIG_VIDEO_SW_CURSOR 350#define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */ 351 352/************************************************************ 353 * USB support 354 ************************************************************/ 355#define CONFIG_USB_UHCI 356#define CONFIG_USB_KEYBOARD 357#define CONFIG_USB_STORAGE 358 359/* Enable needed helper functions */ 360#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ 361 362/************************************************************ 363 * Debug support 364 ************************************************************/ 365#if defined(CONFIG_CMD_KGDB) 366#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 367#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 368#endif 369 370/************************************************************ 371 * support BZIP2 compression 372 ************************************************************/ 373#define CONFIG_BZIP2 1 374 375/************************************************************ 376 * Ident 377 ************************************************************/ 378#define VERSION_TAG "released" 379#define CONFIG_ISO_STRING "MEV-10066-001" 380#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG 381 382 383#endif /* __CONFIG_H */ 384