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26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30
31
32
33#define CONFIG_BOOKE 1
34#define CONFIG_E500 1
35#define CONFIG_MPC85xx 1
36#define CONFIG_MPC8572 1
37#define CONFIG_XPEDITE5370 1
38#define CONFIG_SYS_BOARD_NAME "XPedite5370"
39#define CONFIG_BOARD_EARLY_INIT_R
40
41#define CONFIG_PCI 1
42#define CONFIG_PCI_PNP 1
43#define CONFIG_PCI_SCAN_SHOW 1
44#define CONFIG_PCIE1 1
45#define CONFIG_PCIE2 1
46#define CONFIG_FSL_PCI_INIT 1
47#define CONFIG_SYS_PCI_64BIT 1
48#define CONFIG_FSL_PCIE_RESET 1
49#define CONFIG_FSL_LAW 1
50
51
52
53
54#define CONFIG_MP
55#define CONFIG_BPTR_VIRT_ADDR 0xee000000
56#define CONFIG_MPC8xxx_DISABLE_BPTR
57
58
59
60
61#define CONFIG_FSL_DDR2
62#undef CONFIG_FSL_DDR_INTERACTIVE
63#define CONFIG_SPD_EEPROM
64#define CONFIG_DDR_SPD
65#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
66#define SPD_EEPROM_ADDRESS1 0x54
67#define SPD_EEPROM_ADDRESS2 0x54
68#define SPD_EEPROM_OFFSET 0x200
69#define CONFIG_NUM_DDR_CONTROLLERS 2
70#define CONFIG_DIMM_SLOTS_PER_CTLR 1
71#define CONFIG_CHIP_SELECTS_PER_CTRL 1
72#define CONFIG_DDR_ECC
73#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
74#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
75#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
76#define CONFIG_VERY_BIG_RAM
77
78#ifndef __ASSEMBLY__
79extern unsigned long get_board_sys_clk(unsigned long dummy);
80extern unsigned long get_board_ddr_clk(unsigned long dummy);
81#endif
82
83#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
84#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0)
85
86
87
88
89#define CONFIG_L2_CACHE
90#define CONFIG_BTB
91#define CONFIG_ENABLE_36BIT_PHYS 1
92
93
94
95
96
97#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
98#define CONFIG_SYS_CCSRBAR 0xef000000
99#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
100#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
101#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0xa000)
102#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000)
103
104
105
106
107#define CONFIG_SYS_ALT_MEMTEST
108#define CONFIG_SYS_MEMTEST_START 0x10000000
109#define CONFIG_SYS_MEMTEST_END 0x20000000
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_8 | LCRR_EADC_3)
127
128
129
130
131#define CONFIG_SYS_NAND_BASE 0xef800000
132#define CONFIG_SYS_NAND_BASE2 0xef840000
133#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
134 CONFIG_SYS_NAND_BASE2}
135#define CONFIG_SYS_MAX_NAND_DEVICE 2
136#define CONFIG_MTD_NAND_VERIFY_WRITE
137#define CONFIG_SYS_NAND_QUIET_TEST
138#define CONFIG_NAND_FSL_ELBC
139
140
141
142
143#define CONFIG_SYS_FLASH_BASE 0xf8000000
144#define CONFIG_SYS_FLASH_BASE2 0xf0000000
145#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
146#define CONFIG_SYS_MAX_FLASH_BANKS 2
147#define CONFIG_SYS_MAX_FLASH_SECT 1024
148#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
149#define CONFIG_SYS_FLASH_WRITE_TOUT 500
150#define CONFIG_FLASH_CFI_DRIVER
151#define CONFIG_SYS_FLASH_CFI
152#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
153#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \
154 {0xf7f40000, 0xc0000} }
155#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
156
157
158
159
160
161#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
162 BR_PS_16 | \
163 BR_V)
164#define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB | \
165 OR_GPCM_CSNT | \
166 OR_GPCM_XACS | \
167 OR_GPCM_ACS_DIV2 | \
168 OR_GPCM_SCY_8 | \
169 OR_GPCM_TRLX | \
170 OR_GPCM_EHTR | \
171 OR_GPCM_EAD)
172
173
174#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \
175 BR_PS_16 | \
176 BR_V)
177#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM
178
179
180#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \
181 (2<<BR_DECC_SHIFT) | \
182 BR_PS_8 | \
183 BR_MS_FCM | \
184 BR_V)
185
186
187#define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB | \
188 OR_FCM_PGS | \
189 OR_FCM_CSCT | \
190 OR_FCM_CST | \
191 OR_FCM_CHT | \
192 OR_FCM_SCY_1 | \
193 OR_FCM_TRLX | \
194 OR_FCM_EHTR)
195
196
197#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 | \
198 (2<<BR_DECC_SHIFT) | \
199 BR_PS_8 | \
200 BR_MS_FCM | \
201 BR_V)
202#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM
203
204
205
206
207#define CONFIG_SYS_INIT_RAM_LOCK 1
208#define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000
209#define CONFIG_SYS_INIT_RAM_END 0x00004000
210
211#define CONFIG_SYS_GBL_DATA_SIZE 128
212#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
213#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
214
215#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
216#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
217
218
219
220
221#define CONFIG_CONS_INDEX 1
222#define CONFIG_SYS_NS16550
223#define CONFIG_SYS_NS16550_SERIAL
224#define CONFIG_SYS_NS16550_REG_SIZE 1
225#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
226#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
227#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
228#define CONFIG_SYS_BAUDRATE_TABLE \
229 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
230#define CONFIG_BAUDRATE 115200
231#define CONFIG_LOADS_ECHO 1
232#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
233
234
235
236
237#define CONFIG_SYS_HUSH_PARSER
238#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
239
240
241
242
243#define CONFIG_OF_LIBFDT 1
244#define CONFIG_OF_BOARD_SETUP 1
245#define CONFIG_OF_STDOUT_VIA_ALIAS 1
246
247#define CONFIG_SYS_64BIT_VSPRINTF 1
248#define CONFIG_SYS_64BIT_STRTOUL 1
249
250
251
252
253#define CONFIG_FSL_I2C
254#define CONFIG_HARD_I2C
255#define CONFIG_SYS_I2C_SPEED 400000
256#define CONFIG_SYS_I2C_SLAVE 0x7F
257#define CONFIG_SYS_I2C_OFFSET 0x3000
258#define CONFIG_SYS_I2C2_OFFSET 0x3100
259#define CONFIG_I2C_MULTI_BUS
260
261
262#define CONFIG_SYS_I2C_PEX8518_ADDR 0x70
263
264
265#define CONFIG_SYS_I2C_DS1621_ADDR 0x48
266#define CONFIG_DTT_DS1621
267#define CONFIG_DTT_SENSORS { 0 }
268
269
270#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
271#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
272#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
273#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
274
275
276#define CONFIG_RTC_M41T11 1
277#define CONFIG_SYS_I2C_RTC_ADDR 0x68
278#define CONFIG_SYS_M41T11_BASE_YEAR 2000
279
280
281#define CONFIG_DS4510
282#define CONFIG_SYS_I2C_DS4510_ADDR 0x51
283
284
285#define CONFIG_PCA953X
286#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18
287#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x1c
288#define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e
289#define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f
290#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0
291
292
293
294
295
296
297#define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01
298#define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02
299#define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04
300#define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08
301#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10
302#define CONFIG_SYS_PCA953X_NVM_WP 0x20
303#define CONFIG_SYS_PCA953X_C0_VCORE_VID2 0x40
304#define CONFIG_SYS_PCA953X_C0_VCORE_VID3 0x80
305
306
307#define CONFIG_SYS_PCA953X_XMC0_ROOT0 0x01
308#define CONFIG_SYS_PCA953X_XMC0_MVMR0 0x02
309#define CONFIG_SYS_PCA953X_XMC0_WAKE 0x04
310#define CONFIG_SYS_PCA953X_XMC0_BIST 0x08
311#define CONFIG_SYS_PCA953X_XMC_PRESENT 0x10
312#define CONFIG_SYS_PCA953X_PMC_PRESENT 0x20
313#define CONFIG_SYS_PCA953X_PMC0_MONARCH 0x40
314#define CONFIG_SYS_PCA953X_PMC0_EREADY 0x80
315
316
317#define CONFIG_SYS_PCA953X_P0_GA0 0x01
318#define CONFIG_SYS_PCA953X_P0_GA1 0x02
319#define CONFIG_SYS_PCA953X_P0_GA2 0x04
320#define CONFIG_SYS_PCA953X_P0_GA3 0x08
321#define CONFIG_SYS_PCA953X_P0_GA4 0x10
322#define CONFIG_SYS_PCA953X_P0_GAP 0x20
323#define CONFIG_SYS_PCA953X_P1_SYSEN 0x80
324
325
326#define CONFIG_SYS_PCA953X_GPIO_VPX0 0x01
327#define CONFIG_SYS_PCA953X_GPIO_VPX1 0x02
328#define CONFIG_SYS_PCA953X_GPIO_VPX2 0x04
329#define CONFIG_SYS_PCA953X_GPIO_VPX3 0x08
330#define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL 0x10
331
332
333
334
335
336
337#define CONFIG_SYS_PCIE1_MEM_BASE 0x80000000
338#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BASE
339#define CONFIG_SYS_PCIE1_MEM_SIZE 0x40000000
340#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000
341#define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000
342#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000
343
344
345#define CONFIG_SYS_PCIE2_MEM_BASE 0xc0000000
346#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BASE
347#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000
348#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000
349#define CONFIG_SYS_PCIE2_IO_PHYS 0xe8800000
350#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000
351
352
353
354
355#define CONFIG_TSEC_ENET
356#define CONFIG_PHY_GIGE 1
357#define CONFIG_NET_MULTI 1
358#define CONFIG_TSEC_TBI
359#define CONFIG_MII 1
360#define CONFIG_MII_DEFAULT_TSEC 1
361#define CONFIG_ETHPRIME "eTSEC2"
362
363#define CONFIG_TSEC1 1
364#define CONFIG_TSEC1_NAME "eTSEC1"
365#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
366#define TSEC1_PHY_ADDR 1
367#define TSEC1_PHYIDX 0
368#define CONFIG_HAS_ETH0
369
370#define CONFIG_TSEC2 1
371#define CONFIG_TSEC2_NAME "eTSEC2"
372#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
373#define TSEC2_PHY_ADDR 2
374#define TSEC2_PHYIDX 0
375#define CONFIG_HAS_ETH1
376
377
378
379
380#include <config_cmd_default.h>
381
382#define CONFIG_CMD_ASKENV
383#define CONFIG_CMD_DATE
384#define CONFIG_CMD_DHCP
385#define CONFIG_CMD_DS4510
386#define CONFIG_CMD_DS4510_INFO
387#define CONFIG_CMD_DTT
388#define CONFIG_CMD_EEPROM
389#define CONFIG_CMD_ELF
390#define CONFIG_CMD_FLASH
391#define CONFIG_CMD_I2C
392#define CONFIG_CMD_JFFS2
393#define CONFIG_CMD_MII
394#define CONFIG_CMD_NAND
395#define CONFIG_CMD_NET
396#define CONFIG_CMD_PCA953X
397#define CONFIG_CMD_PCA953X_INFO
398#define CONFIG_CMD_PCI
399#define CONFIG_CMD_PING
400#define CONFIG_CMD_SAVEENV
401#define CONFIG_CMD_SNTP
402
403
404
405
406#define CONFIG_SYS_LONGHELP
407#define CONFIG_SYS_LOAD_ADDR 0x2000000
408#define CONFIG_SYS_PROMPT "=> "
409#define CONFIG_SYS_CBSIZE 256
410#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
411#define CONFIG_SYS_MAXARGS 16
412#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
413#define CONFIG_SYS_HZ 1000
414#define CONFIG_CMDLINE_EDITING 1
415#define CONFIG_LOADADDR 0x1000000
416#define CONFIG_BOOTDELAY 3
417#define CONFIG_PANIC_HANG
418#define CONFIG_PREBOOT
419#define CONFIG_FIT 1
420#define CONFIG_FIT_VERBOSE 1
421#define CONFIG_INTEGRITY
422
423
424
425
426
427
428#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
429#define CONFIG_SYS_BOOTM_LEN (16 << 20)
430
431
432
433
434#define BOOTFLAG_COLD 0x01
435#define BOOTFLAG_WARM 0x02
436
437
438
439
440#define CONFIG_ENV_IS_IN_FLASH 1
441#define CONFIG_ENV_SECT_SIZE 0x20000
442#define CONFIG_ENV_SIZE 0x8000
443#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
444
445
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447
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453
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456
457
458
459#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000)
460#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xf7f80000)
461#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000)
462#define CONFIG_FDT2_ENV_ADDR MK_STR(0xf7f00000)
463#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000)
464#define CONFIG_OS2_ENV_ADDR MK_STR(0xf6f00000)
465
466#define CONFIG_PROG_UBOOT1 \
467 "$download_cmd $loadaddr $ubootfile; " \
468 "if test $? -eq 0; then " \
469 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
470 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
471 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \
472 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
473 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \
474 "if test $? -ne 0; then " \
475 "echo PROGRAM FAILED; " \
476 "else; " \
477 "echo PROGRAM SUCCEEDED; " \
478 "fi; " \
479 "else; " \
480 "echo DOWNLOAD FAILED; " \
481 "fi;"
482
483#define CONFIG_PROG_UBOOT2 \
484 "$download_cmd $loadaddr $ubootfile; " \
485 "if test $? -eq 0; then " \
486 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
487 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
488 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \
489 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
490 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \
491 "if test $? -ne 0; then " \
492 "echo PROGRAM FAILED; " \
493 "else; " \
494 "echo PROGRAM SUCCEEDED; " \
495 "fi; " \
496 "else; " \
497 "echo DOWNLOAD FAILED; " \
498 "fi;"
499
500#define CONFIG_BOOT_OS_NET \
501 "$download_cmd $osaddr $osfile; " \
502 "if test $? -eq 0; then " \
503 "if test -n $fdtaddr; then " \
504 "$download_cmd $fdtaddr $fdtfile; " \
505 "if test $? -eq 0; then " \
506 "bootm $osaddr - $fdtaddr; " \
507 "else; " \
508 "echo FDT DOWNLOAD FAILED; " \
509 "fi; " \
510 "else; " \
511 "bootm $osaddr; " \
512 "fi; " \
513 "else; " \
514 "echo OS DOWNLOAD FAILED; " \
515 "fi;"
516
517#define CONFIG_PROG_OS1 \
518 "$download_cmd $osaddr $osfile; " \
519 "if test $? -eq 0; then " \
520 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \
521 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \
522 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \
523 "if test $? -ne 0; then " \
524 "echo OS PROGRAM FAILED; " \
525 "else; " \
526 "echo OS PROGRAM SUCCEEDED; " \
527 "fi; " \
528 "else; " \
529 "echo OS DOWNLOAD FAILED; " \
530 "fi;"
531
532#define CONFIG_PROG_OS2 \
533 "$download_cmd $osaddr $osfile; " \
534 "if test $? -eq 0; then " \
535 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \
536 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \
537 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \
538 "if test $? -ne 0; then " \
539 "echo OS PROGRAM FAILED; " \
540 "else; " \
541 "echo OS PROGRAM SUCCEEDED; " \
542 "fi; " \
543 "else; " \
544 "echo OS DOWNLOAD FAILED; " \
545 "fi;"
546
547#define CONFIG_PROG_FDT1 \
548 "$download_cmd $fdtaddr $fdtfile; " \
549 "if test $? -eq 0; then " \
550 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \
551 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \
552 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \
553 "if test $? -ne 0; then " \
554 "echo FDT PROGRAM FAILED; " \
555 "else; " \
556 "echo FDT PROGRAM SUCCEEDED; " \
557 "fi; " \
558 "else; " \
559 "echo FDT DOWNLOAD FAILED; " \
560 "fi;"
561
562#define CONFIG_PROG_FDT2 \
563 "$download_cmd $fdtaddr $fdtfile; " \
564 "if test $? -eq 0; then " \
565 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \
566 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \
567 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \
568 "if test $? -ne 0; then " \
569 "echo FDT PROGRAM FAILED; " \
570 "else; " \
571 "echo FDT PROGRAM SUCCEEDED; " \
572 "fi; " \
573 "else; " \
574 "echo FDT DOWNLOAD FAILED; " \
575 "fi;"
576
577#define CONFIG_EXTRA_ENV_SETTINGS \
578 "autoload=yes\0" \
579 "download_cmd=tftp\0" \
580 "console_args=console=ttyS0,115200\0" \
581 "root_args=root=/dev/nfs rw\0" \
582 "misc_args=ip=on\0" \
583 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
584 "bootfile=/home/user/file\0" \
585 "osfile=/home/user/uImage-XPedite5370\0" \
586 "fdtfile=/home/user/xpedite5370.dtb\0" \
587 "ubootfile=/home/user/u-boot.bin\0" \
588 "fdtaddr=c00000\0" \
589 "osaddr=0x1000000\0" \
590 "loadaddr=0x1000000\0" \
591 "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \
592 "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \
593 "prog_os1="CONFIG_PROG_OS1"\0" \
594 "prog_os2="CONFIG_PROG_OS2"\0" \
595 "prog_fdt1="CONFIG_PROG_FDT1"\0" \
596 "prog_fdt2="CONFIG_PROG_FDT2"\0" \
597 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
598 "bootcmd_flash1=run set_bootargs; " \
599 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
600 "bootcmd_flash2=run set_bootargs; " \
601 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
602 "bootcmd=run bootcmd_flash1\0"
603#endif
604