1/* 2 * Ulf Samuelsson <ulf@atmel.com> 3 * Rick Bronson <rick@efn.org> 4 * 5 * Configuration settings for the AT91RM9200EK board. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26#ifndef __CONFIG_H 27#define __CONFIG_H 28 29/* ARM asynchronous clock */ 30/* 31 * from 18.432 MHz crystal 32 * (18432000 / 4 * 39) 33 */ 34#define AT91C_MAIN_CLOCK 179712000 35/* 36 * peripheral clock 37 * (AT91C_MASTER_CLOCK / 3) 38 */ 39#define AT91C_MASTER_CLOCK 59904000 40 41#define AT91_SLOW_CLOCK 32768 /* slow clock */ 42 43#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ 44#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ 45#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */ 46#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 47#define USE_920T_MMU 1 48 49#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 50#define CONFIG_SETUP_MEMORY_TAGS 1 51#define CONFIG_INITRD_TAG 1 52 53/* 54 * LowLevel Init 55 */ 56#ifndef CONFIG_SKIP_LOWLEVEL_INIT 57#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 58/* flash */ 59#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 60#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ 61 62/* clocks */ 63#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ 64#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ 65/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ 66#define CONFIG_SYS_MCKR_VAL 0x00000202 67 68/* sdram */ 69#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ 70#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 71#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 72#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ 73#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ 74#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ 75#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ 76#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ 77#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ 78#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ 79#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ 80#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ 81#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ 82#else 83#define CONFIG_SKIP_RELOCATE_UBOOT 84#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 85 86/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */ 87#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33 88 89/* 90 * Memory Configuration 91 */ 92#define CONFIG_NR_DRAM_BANKS 1 93#define PHYS_SDRAM 0x20000000 94#define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */ 95 96#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 97#define CONFIG_SYS_MEMTEST_END \ 98 (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144) 99 100/* 101 * Hardware drivers 102 */ 103 104/* 105 * UART Configuration 106 * 107 * define one of these to choose the DBGU, 108 * USART0 or USART1 as console 109 */ 110#define CONFIG_AT91RM9200_USART 111#define CONFIG_DBGU 112#undef CONFIG_USART0 113#undef CONFIG_USART1 114/* don't include RTS/CTS flow control support */ 115#undef CONFIG_HWFLOW 116/* disable modem initialization stuff */ 117#undef CONFIG_MODEM_SUPPORT 118 119#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 120#define CONFIG_BAUDRATE 115200 121 122/* 123 * Command line configuration. 124 */ 125#include <config_cmd_default.h> 126 127#define CONFIG_CMD_DHCP 128#define CONFIG_CMD_FAT 129#define CONFIG_CMD_MII 130#define CONFIG_CMD_PING 131 132#undef CONFIG_CMD_BDI 133#undef CONFIG_CMD_IMI 134#undef CONFIG_CMD_FPGA 135#undef CONFIG_CMD_MISC 136#undef CONFIG_CMD_LOADS 137 138#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ 139/* Options for MMC/SD Card */ 140#define CONFIG_DOS_PARTITION 1 141#undef CONFIG_MMC 142#define CONFIG_SYS_MMC_BASE 0xFFFB4000 143#define CONFIG_SYS_MMC_BLOCKSIZE 512 144 145/* 146 * Network Driver Setting 147 */ 148#define CONFIG_DRIVER_ETHER 149#define CONFIG_NET_RETRY_COUNT 20 150#define CONFIG_AT91C_USE_RMII 151 152/* 153 * AC Characteristics 154 * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns 155 */ 156#define DATAFLASH_TCSS (0xC << 16) 157#define DATAFLASH_TCHS (0x1 << 24) 158 159#if defined(CONFIG_HAS_DATAFLASH) 160#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) 161#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 162#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384 163/* Logical adress for CS0 */ 164#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 165/* Logical adress for CS3 */ 166#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 167#define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1 168#define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22 169#endif 170 171/* 172 * NOR Flash 173 */ 174#define CONFIG_SYS_FLASH_BASE 0x10000000 175#define PHYS_FLASH_SIZE 0x800000 /* 8MB */ 176#define CONFIG_SYS_FLASH_CFI 1 177#define CONFIG_FLASH_CFI_DRIVER 1 178#define CONFIG_SYS_MAX_FLASH_BANKS 1 179#define CONFIG_SYS_MAX_FLASH_SECT 256 180#define CONFIG_SYS_FLASH_PROTECTION 181 182/* 183 * Environment Settings 184 */ 185#ifdef CONFIG_ENV_IS_IN_DATAFLASH 186/* 187 * Datasflash Environment Settings 188 */ 189#define CONFIG_ENV_OFFSET 0x4200 190#define CONFIG_ENV_ADDR \ 191 (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 192/* 8 * 1056 really , but start.s is not OK with this*/ 193#define CONFIG_ENV_SIZE 0x2000 194 195#else 196/* 197 * NOR Flash Environment Settings 198 */ 199#define CONFIG_ENV_IS_IN_FLASH 1 200 201#ifdef CONFIG_SKIP_LOWLEVEL_INIT 202/* 203 * between boot.bin and u-boot.bin.gz 204 */ 205#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000) 206#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ 207#else 208/* 209 * after u-boot.bin 210 */ 211#define CONFIG_ENV_ADDR \ 212 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 213#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ 214/* The following #defines are needed to get flash environment right */ 215#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 216#define CONFIG_SYS_MONITOR_LEN \ 217 (CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE) 218#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 219 220#endif /* CONFIG_ENV_IS_IN_DATAFLASH */ 221 222/* 223 * Boot option 224 */ 225#define CONFIG_BOOTDELAY 3 226 227#ifdef CONFIG_SKIP_LOWLEVEL_INIT 228/* boot.bin, env, u-boot.bin.gz */ 229#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */ 230#define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000) 231#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */ 232#else 233/* u-boot.bin */ 234#define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */ 235#define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE 236#define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */ 237#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 238 239#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ 240#define CONFIG_ENV_OVERWRITE 1 241 242/* 243 * USB Config 244 */ 245#define CONFIG_CMD_USB 246#define CONFIG_USB_OHCI_NEW 1 247#define CONFIG_USB_KEYBOARD 1 248#define CONFIG_USB_STORAGE 1 249#define CONFIG_DOS_PARTITION 1 250 251#undef CONFIG_SYS_USB_OHCI_BOARD_INIT 252#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 253#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE 254#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" 255#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 256 257/* 258 * I2C 259 */ 260#define CONFIG_HARD_I2C 261 262#ifdef CONFIG_HARD_I2C 263#define CONFIG_CMD_I2C 264#define CONFIG_SYS_I2C_SPEED 0 /* not used */ 265#define CONFIG_SYS_I2C_SLAVE 0 /* not used */ 266#endif 267 268/* 269 * Shell Settings 270 */ 271#define CONFIG_CMDLINE_EDITING 1 272#define CONFIG_SYS_LONGHELP 1 273#define CONFIG_AUTO_COMPLETE 1 274#define CONFIG_SYS_HUSH_PARSER 1 275#define CONFIG_SYS_PROMPT "U-Boot> " 276#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 277#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 278#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 279/* Print Buffer Size */ 280#define CONFIG_SYS_PBSIZE \ 281 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 282 283#ifndef __ASSEMBLY__ 284/*----------------------------------------------------------------------- 285 * Board specific extension for bd_info 286 * 287 * This structure is embedded in the global bd_info (bd_t) structure 288 * and can be used by the board specific code (eg board/...) 289 */ 290 291struct bd_info_ext { 292 /* helper variable for board environment handling 293 * 294 * env_crc_valid == 0 => uninitialised 295 * env_crc_valid > 0 => environment crc in flash is valid 296 * env_crc_valid < 0 => environment crc in flash is invalid 297 */ 298 int env_crc_valid; 299}; 300#endif 301 302#define CONFIG_SYS_HZ 1000 303/* 304 * AT91C_TC0_CMR is implicitly set to 305 * AT91C_TC_TIMER_DIV1_CLOCK 306 */ 307#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) 308 309/* 310 * Size of malloc() pool 311 */ 312#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \ 313 , 0x1000) 314/* size in bytes reserved for initial data */ 315#define CONFIG_SYS_GBL_DATA_SIZE 128 316 317#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ 318#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/ 319#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/ 320#endif 321