1/* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian.pop@leadtechdesign.com> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31#ifndef __CONFIG_H 32#define __CONFIG_H 33 34/* Common stuff */ 35#define CONFIG_SYS_HZ 1000 /* decrementer freq */ 36#define CONFIG_MEESC 1 /* Board is esd MEESC */ 37#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 38#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ 39#define CONFIG_DISPLAY_BOARDINFO 1 40#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ 41#define CONFIG_PREBOOT /* enable preboot variable */ 42#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 43#define CONFIG_SETUP_MEMORY_TAGS 1 44#define CONFIG_INITRD_TAG 1 45#define CONFIG_SERIAL_TAG 1 46#define CONFIG_REVISION_TAG 1 47#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ 48 49#define CONFIG_SKIP_LOWLEVEL_INIT 50#define CONFIG_SKIP_RELOCATE_UBOOT 51 52#define CONFIG_ARCH_CPU_INIT 53 54/* 55 * Hardware drivers 56 */ 57 58/* Console output */ 59#define CONFIG_ATMEL_USART 1 60#undef CONFIG_USART0 61#undef CONFIG_USART1 62#undef CONFIG_USART2 63#define CONFIG_USART3 1 /* USART 3 is DBGU */ 64 65#define CONFIG_BOOTDELAY 3 66#define CONFIG_ZERO_BOOTDELAY_CHECK 1 67 68/* 69 * BOOTP options 70 */ 71#define CONFIG_BOOTP_BOOTFILESIZE 1 72#define CONFIG_BOOTP_BOOTPATH 1 73#define CONFIG_BOOTP_GATEWAY 1 74#define CONFIG_BOOTP_HOSTNAME 1 75 76/* 77 * Command line configuration. 78 */ 79#include <config_cmd_default.h> 80#undef CONFIG_CMD_BDI 81#undef CONFIG_CMD_AUTOSCRIPT 82#undef CONFIG_CMD_FPGA 83#undef CONFIG_CMD_LOADS 84#undef CONFIG_CMD_IMLS 85#undef CONFIG_CMD_USB 86 87#define CONFIG_CMD_PING 1 88#define CONFIG_CMD_DHCP 1 89#define CONFIG_CMD_NAND 1 90 91/* LED */ 92#define CONFIG_AT91_LED 1 93 94/* SDRAM */ 95#define CONFIG_NR_DRAM_BANKS 1 96#define PHYS_SDRAM 0x20000000 97 98/* DataFlash */ 99#define CONFIG_ATMEL_DATAFLASH_SPI 100#define CONFIG_HAS_DATAFLASH 1 101#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) 102#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 103#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 104#define AT91_SPI_CLK 15000000 105#define DATAFLASH_TCSS (0x1a << 16) 106#define DATAFLASH_TCHS (0x1 << 24) 107 108/* NOR flash is not populated, disable it */ 109#define CONFIG_SYS_NO_FLASH 1 110 111/* NAND flash */ 112#ifdef CONFIG_CMD_NAND 113#define CONFIG_NAND_ATMEL 114#define CONFIG_SYS_MAX_NAND_DEVICE 1 115#define CONFIG_SYS_NAND_BASE 0x40000000 116#define CONFIG_SYS_NAND_DBW_8 1 117/* our ALE is AD21 */ 118#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 119/* our CLE is AD22 */ 120#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 121#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 122#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 123 124#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ 125#endif 126 127/* Ethernet */ 128#define CONFIG_MACB 1 129#define CONFIG_RMII 1 130#define CONFIG_NET_MULTI 1 131#define CONFIG_NET_RETRY_COUNT 20 132#undef CONFIG_RESET_PHY_R 133 134#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 135 136#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 137#define CONFIG_SYS_MEMTEST_END 0x21e00000 138 139#define CONFIG_SYS_USE_DATAFLASH 1 140#undef CONFIG_SYS_USE_NANDFLASH 141 142/* CAN */ 143#define CONFIG_AT91_CAN 1 144 145/* hw-controller addresses */ 146#define CONFIG_ET1100_BASE 0x70000000 147 148/* bootstrap + u-boot + env in dataflash on CS0 */ 149#define CONFIG_ENV_IS_IN_DATAFLASH 1 150#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 151 0x8400) 152#define CONFIG_ENV_OFFSET 0x4200 153#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 154 CONFIG_ENV_OFFSET) 155#define CONFIG_ENV_SIZE 0x4200 156 157#define CONFIG_BAUDRATE 115200 158#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 159 160#define CONFIG_SYS_PROMPT "=> " 161#define CONFIG_SYS_CBSIZE 256 162#define CONFIG_SYS_MAXARGS 16 163#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 164 sizeof(CONFIG_SYS_PROMPT) + 16) 165#define CONFIG_SYS_LONGHELP 1 166#define CONFIG_CMDLINE_EDITING 1 167 168/* 169 * Size of malloc() pool 170 */ 171#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 172 128*1024, 0x1000) 173#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 174 175#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ 176 177#ifdef CONFIG_USE_IRQ 178#error CONFIG_USE_IRQ not supported 179#endif 180 181#endif 182