1/* 2 * (C) Copyright 2001 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/* 25 * Configuration settings for the sbc8240 board. 26 */ 27 28/* ------------------------------------------------------------------------- */ 29 30/* 31 * board/config.h - configuration options, board specific 32 */ 33 34#ifndef __CONFIG_H 35#define __CONFIG_H 36 37/* 38 * High Level Configuration Options 39 * (easy to change) 40 */ 41 42#define CONFIG_MPC824X 1 43#define CONFIG_MPC8240 1 44#define CONFIG_WRSBC8240 1 45 46#define CONFIG_CONS_INDEX 1 47#define CONFIG_BAUDRATE 9600 48#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 49 50#define CONFIG_PREBOOT "echo;echo Welcome to U-Boot for the sbc8240;echo;echo Type \"? or help\" to get on-line help;echo" 51 52#undef CONFIG_BOOTARGS 53 54#define CONFIG_BOOTCOMMAND "version;echo;tftpboot $loadaddr $loadfile;bootvx" /* autoboot command */ 55 56#define CONFIG_EXTRA_ENV_SETTINGS \ 57 "bootargs=$fei(0,0)host:/T221ppc/target/config/sbc8240/vxWorks.st " \ 58 "e=192.168.193.102 h=192.168.193.99 u=target pw=hello f=0x08 " \ 59 "tn=sbc8240 o=fei \0" \ 60 "env_startaddr=FFF70000\0" \ 61 "env_endaddr=FFF7FFFF\0" \ 62 "loadfile=vxWorks.st\0" \ 63 "loadaddr=0x01000000\0" \ 64 "net_load=tftpboot $loadaddr $loadfile\0" \ 65 "uboot_startaddr=FFF00000\0" \ 66 "uboot_endaddr=FFF3FFFF\0" \ 67 "update=tftp $loadaddr /u-boot.bin;" \ 68 "protect off $uboot_startaddr $uboot_endaddr;" \ 69 "era $uboot_startaddr $uboot_endaddr;" \ 70 "cp.b $loadaddr $uboot_startaddr $filesize;" \ 71 "protect on $uboot_startaddr $uboot_endaddr\0" \ 72 "zapenv=protect off $env_startaddr $env_endaddr;" \ 73 "era $env_startaddr $env_endaddr;" \ 74 "protect on $env_startaddr $env_endaddr\0" 75 76#define CONFIG_BOOTDELAY 5 77 78/* 79 * BOOTP options 80 */ 81#define CONFIG_BOOTP_SUBNETMASK 82#define CONFIG_BOOTP_GATEWAY 83#define CONFIG_BOOTP_HOSTNAME 84#define CONFIG_BOOTP_BOOTPATH 85#define CONFIG_BOOTP_BOOTFILESIZE 86 87 88#define CONFIG_ENV_OVERWRITE 89 90 91/* 92 * Command line configuration. 93 */ 94#include <config_cmd_default.h> 95 96#define CONFIG_CMD_BSP 97#define CONFIG_CMD_DIAG 98#define CONFIG_CMD_ELF 99#define CONFIG_CMD_SAVEENV 100#define CONFIG_CMD_FLASH 101#define CONFIG_CMD_PCI 102#define CONFIG_CMD_PING 103#define CONFIG_CMD_SDRAM 104 105 106/* 107 * Miscellaneous configurable options 108 */ 109#define CONFIG_SYS_LONGHELP /* undef to save memory */ 110#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 111#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 112 113#if 1 114#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ 115#endif 116#ifdef CONFIG_SYS_HUSH_PARSER 117#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 118#endif 119 120#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */ 121#define CONFIG_IPADDR 192.168.193.102 122#define CONFIG_NETMASK 255.255.255.248 123#define CONFIG_SERVERIP 192.168.193.99 124 125#define CONFIG_STATUS_LED /* Status LED enabled */ 126#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */ 127 128#define STATUS_LED_BIT 0x00000001 129#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 130#define STATUS_LED_STATE STATUS_LED_BLINKING 131#define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */ 132#define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ 133 134#ifndef __ASSEMBLY__ 135/* LEDs */ 136typedef unsigned int led_id_t; 137 138#define __led_toggle(_msk) \ 139 do { \ 140 *((volatile char *) (CONFIG_SYS_LED_BASE)) ^= (_msk); \ 141 } while(0) 142 143#define __led_set(_msk, _st) \ 144 do { \ 145 if ((_st)) \ 146 *((volatile char *) (CONFIG_SYS_LED_BASE)) |= (_msk); \ 147 else \ 148 *((volatile char *) (CONFIG_SYS_LED_BASE)) &= ~(_msk); \ 149 } while(0) 150 151#define __led_init(msk, st) __led_set(msk, st) 152 153#endif 154 155#define CONFIG_MISC_INIT_R 156#define CONFIG_SYS_LED_BASE 0xFFE80000 157 158/* Print Buffer Size 159 */ 160#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 161 162#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 163#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 164#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* Default load address */ 165 166/*----------------------------------------------------------------------- 167 * Start addresses for the final memory configuration 168 * (Set up by the startup code) 169 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 170 */ 171#define CONFIG_SYS_SDRAM_BASE 0x00000000 172#define CONFIG_SYS_FLASH_BASE 0xFFF00000 173 174#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 175 176#define CONFIG_SYS_EUMB_ADDR 0xFCE00000 177 178#define CONFIG_SYS_MONITOR_BASE TEXT_BASE 179 180#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 181#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 182 183#define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */ 184#define CONFIG_SYS_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */ 185 186 /* Maximum amount of RAM. 187 */ 188#define CONFIG_SYS_MAX_RAM_SIZE 0x10000000 189 190#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE 191#undef CONFIG_SYS_RAMBOOT 192#else 193#define CONFIG_SYS_RAMBOOT 194#endif 195 196/*----------------------------------------------------------------------- 197 * Definitions for initial stack pointer and data area 198 */ 199 200 /* Size in bytes reserved for initial data 201 */ 202#define CONFIG_SYS_GBL_DATA_SIZE 128 203 204#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 205#define CONFIG_SYS_INIT_RAM_END 0x1000 206#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 207 208/* 209 * NS16550 Configuration 210 */ 211#define CONFIG_SYS_NS16550 212#define CONFIG_SYS_NS16550_SERIAL 213 214#define CONFIG_SYS_NS16550_REG_SIZE 1 215 216#define CONFIG_SYS_NS16550_CLK 3686400 217 218#define CONFIG_SYS_NS16550_COM1 0xFFF80000 219 220/* 221 * Low Level Configuration Settings 222 * (address mappings, register initial values, etc.) 223 * You should know what you are doing if you make changes here. 224 * For the detail description refer to the MPC8240 user's manual. 225 */ 226 227#define CONFIG_SYS_CLK_FREQ 33000000 228#define CONFIG_SYS_HZ 1000 229#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 3 230 231 /* Bit-field values for MCCR1. 232 */ 233#define CONFIG_SYS_ROMNAL 0 234#define CONFIG_SYS_ROMFAL 7 235 236 /* Bit-field values for MCCR2. 237 */ 238#define CONFIG_SYS_REFINT 430 /* Refresh interval */ 239 240 /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. 241 */ 242#define CONFIG_SYS_BSTOPRE 192 243 244 /* Bit-field values for MCCR3. 245 */ 246#define CONFIG_SYS_REFREC 2 /* Refresh to activate interval */ 247#define CONFIG_SYS_RDLAT 3 /* Data latancy from read command */ 248 249 /* Bit-field values for MCCR4. 250 */ 251#define CONFIG_SYS_PRETOACT 2 /* Precharge to activate interval */ 252#define CONFIG_SYS_ACTTOPRE 5 /* Activate to Precharge interval */ 253#define CONFIG_SYS_SDMODE_CAS_LAT 2 /* SDMODE CAS latancy */ 254#define CONFIG_SYS_SDMODE_WRAP 0 /* SDMODE wrap type */ 255#define CONFIG_SYS_SDMODE_BURSTLEN 2 /* SDMODE Burst length */ 256#define CONFIG_SYS_ACTORW 2 257#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1 258 259/* Memory bank settings. 260 * Only bits 20-29 are actually used from these vales to set the 261 * start/end addresses. The upper two bits will always be 0, and the lower 262 * 20 bits will be 0x00000 for a start address, or 0xfffff for an end 263 * address. Refer to the MPC8240 book. 264 */ 265 266#define CONFIG_SYS_BANK0_START 0x00000000 267#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1) 268#define CONFIG_SYS_BANK0_ENABLE 1 269#define CONFIG_SYS_BANK1_START 0x3ff00000 270#define CONFIG_SYS_BANK1_END 0x3fffffff 271#define CONFIG_SYS_BANK1_ENABLE 0 272#define CONFIG_SYS_BANK2_START 0x3ff00000 273#define CONFIG_SYS_BANK2_END 0x3fffffff 274#define CONFIG_SYS_BANK2_ENABLE 0 275#define CONFIG_SYS_BANK3_START 0x3ff00000 276#define CONFIG_SYS_BANK3_END 0x3fffffff 277#define CONFIG_SYS_BANK3_ENABLE 0 278#define CONFIG_SYS_BANK4_START 0x3ff00000 279#define CONFIG_SYS_BANK4_END 0x3fffffff 280#define CONFIG_SYS_BANK4_ENABLE 0 281#define CONFIG_SYS_BANK5_START 0x3ff00000 282#define CONFIG_SYS_BANK5_END 0x3fffffff 283#define CONFIG_SYS_BANK5_ENABLE 0 284#define CONFIG_SYS_BANK6_START 0x3ff00000 285#define CONFIG_SYS_BANK6_END 0x3fffffff 286#define CONFIG_SYS_BANK6_ENABLE 0 287#define CONFIG_SYS_BANK7_START 0x3ff00000 288#define CONFIG_SYS_BANK7_END 0x3fffffff 289#define CONFIG_SYS_BANK7_ENABLE 0 290 291#define CONFIG_SYS_ODCR 0xff 292 293#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) 294#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) 295 296#define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE) 297#define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) 298 299#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) 300#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 301 302#define CONFIG_SYS_IBAT3L (0xFC000000 | BATL_PP_10 | BATL_CACHEINHIBIT) 303#define CONFIG_SYS_IBAT3U (0xFC000000 | BATU_BL_64M | BATU_VS | BATU_VP) 304 305#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L 306#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U 307#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L 308#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U 309#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L 310#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U 311#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L 312#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U 313 314/* 315 * For booting Linux, the board info and command line data 316 * have to be in the first 8 MB of memory, since this is 317 * the maximum mapped by the Linux kernel during initialization. 318 */ 319#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 320 321/*----------------------------------------------------------------------- 322 * FLASH organization 323 */ 324#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */ 325#define CONFIG_SYS_MAX_FLASH_SECT 256 /* Max number of sectors in one bank */ 326 327#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 328#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 329 330/* 331 * Init Memory Controller: 332 * 333 * BR0/1 and OR0/1 (FLASH) 334 */ 335 336#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ 337#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ 338 339 /* Warining: environment is not EMBEDDED in the U-Boot code. 340 * It's stored in flash separately. 341 */ 342#define CONFIG_ENV_IS_IN_FLASH 1 343#define CONFIG_ENV_ADDR 0xFFF70000 344#define CONFIG_ENV_SIZE 0x4000 /* Size of the Environment */ 345#define CONFIG_ENV_OFFSET 0 /* starting right at the beginning */ 346#define CONFIG_ENV_SECT_SIZE 0x40000 /* Size of the Environment Sector */ 347 348/*----------------------------------------------------------------------- 349 * Cache Configuration 350 */ 351#define CONFIG_SYS_CACHELINE_SIZE 32 352#if defined(CONFIG_CMD_KGDB) 353# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ 354#endif 355 356/* 357 * Internal Definitions 358 * 359 * Boot Flags 360 */ 361#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ 362#define BOOTFLAG_WARM 0x02 /* Software reboot */ 363 364/*----------------------------------------------------------------------- 365 * PCI stuff 366 *----------------------------------------------------------------------- 367 */ 368#define CONFIG_PCI /* include pci support */ 369#define CONFIG_PCI_PNP /* we need Plug 'n Play */ 370#define CONFIG_NET_MULTI /* Multi ethernet cards support */ 371#define CONFIG_TULIP 372#define CONFIG_EEPRO100 373#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ 374#endif /* __CONFIG_H */ 375