uboot/cpu/arm920t/a320/timer.c
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   1/*
   2 * (C) Copyright 2009 Faraday Technology
   3 * Po-Yu Chuang <ratbert@faraday-tech.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; either version 2 of the License, or
   8 * (at your option) any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18 */
  19
  20#include <common.h>
  21#include <asm/io.h>
  22#include <asm/arch/ftpmu010.h>
  23#include <asm/arch/fttmr010.h>
  24
  25static ulong timestamp;
  26static ulong lastdec;
  27
  28static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
  29static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
  30
  31#define TIMER_CLOCK     32768
  32#define TIMER_LOAD_VAL  0xffffffff
  33
  34int timer_init(void)
  35{
  36        unsigned int oscc;
  37        unsigned int cr;
  38
  39        debug("%s()\n", __func__);
  40
  41        /* disable timers */
  42        writel(0, &tmr->cr);
  43
  44        /*
  45         * use 32768Hz oscillator for RTC, WDT, TIMER
  46         */
  47
  48        /* enable the 32768Hz oscillator */
  49        oscc = readl(&pmu->OSCC);
  50        oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI);
  51        writel(oscc, &pmu->OSCC);
  52
  53        /* wait until ready */
  54        while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE))
  55                ;
  56
  57        /* select 32768Hz oscillator */
  58        oscc = readl(&pmu->OSCC);
  59        oscc |= FTPMU010_OSCC_OSCL_RTCLSEL;
  60        writel(oscc, &pmu->OSCC);
  61
  62        /* setup timer */
  63        writel(TIMER_LOAD_VAL, &tmr->timer3_load);
  64        writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
  65        writel(0, &tmr->timer3_match1);
  66        writel(0, &tmr->timer3_match2);
  67
  68        /* we don't want timer to issue interrupts */
  69        writel(FTTMR010_TM3_MATCH1 |
  70               FTTMR010_TM3_MATCH2 |
  71               FTTMR010_TM3_OVERFLOW,
  72               &tmr->interrupt_mask);
  73
  74        cr = readl(&tmr->cr);
  75        cr |= FTTMR010_TM3_CLOCK;       /* use external clock */
  76        cr |= FTTMR010_TM3_ENABLE;
  77        writel(cr, &tmr->cr);
  78
  79        /* init the timestamp and lastdec value */
  80        reset_timer_masked();
  81
  82        return 0;
  83}
  84
  85/*
  86 * timer without interrupts
  87 */
  88
  89/*
  90 * reset time
  91 */
  92void reset_timer_masked(void)
  93{
  94        /* capure current decrementer value time */
  95        lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
  96        timestamp = 0;          /* start "advancing" time stamp from 0 */
  97
  98        debug("%s(): lastdec = %lx\n", __func__, lastdec);
  99}
 100
 101void reset_timer(void)
 102{
 103        debug("%s()\n", __func__);
 104        reset_timer_masked();
 105}
 106
 107/*
 108 * return timer ticks
 109 */
 110ulong get_timer_masked(void)
 111{
 112        /* current tick value */
 113        ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
 114
 115        debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
 116
 117        if (lastdec >= now) {
 118                /*
 119                 * normal mode (non roll)
 120                 * move stamp fordward with absoulte diff ticks
 121                 */
 122                timestamp += lastdec - now;
 123        } else {
 124                /*
 125                 * we have overflow of the count down timer
 126                 *
 127                 * nts = ts + ld + (TLV - now)
 128                 * ts=old stamp, ld=time that passed before passing through -1
 129                 * (TLV-now) amount of time after passing though -1
 130                 * nts = new "advancing time stamp"...it could also roll and
 131                 * cause problems.
 132                 */
 133                timestamp += lastdec + TIMER_LOAD_VAL - now;
 134        }
 135
 136        lastdec = now;
 137
 138        debug("%s() returns %lx\n", __func__, timestamp);
 139
 140        return timestamp;
 141}
 142
 143/*
 144 * return difference between timer ticks and base
 145 */
 146ulong get_timer(ulong base)
 147{
 148        debug("%s(%lx)\n", __func__, base);
 149        return get_timer_masked() - base;
 150}
 151
 152void set_timer(ulong t)
 153{
 154        debug("%s(%lx)\n", __func__, t);
 155        timestamp = t;
 156}
 157
 158/* delay x useconds AND perserve advance timstamp value */
 159void udelay(unsigned long usec)
 160{
 161        long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
 162        unsigned long now, last = readl(&tmr->timer3_counter);
 163
 164        debug("%s(%lu)\n", __func__, usec);
 165        while (tmo > 0) {
 166                now = readl(&tmr->timer3_counter);
 167                if (now > last) /* count down timer overflow */
 168                        tmo -= TIMER_LOAD_VAL + last - now;
 169                else
 170                        tmo -= last - now;
 171                last = now;
 172        }
 173}
 174
 175/*
 176 * This function is derived from PowerPC code (read timebase as long long).
 177 * On ARM it just returns the timer value.
 178 */
 179unsigned long long get_ticks(void)
 180{
 181        debug("%s()\n", __func__);
 182        return get_timer(0);
 183}
 184
 185/*
 186 * This function is derived from PowerPC code (timebase clock frequency).
 187 * On ARM it returns the number of timer ticks per second.
 188 */
 189ulong get_tbclk(void)
 190{
 191        debug("%s()\n", __func__);
 192        return CONFIG_SYS_HZ;
 193}
 194