1/* 2 * (C) Copyright 2008 3 * Texas Instruments 4 * 5 * Richard Woodruff <r-woodruff2@ti.com> 6 * Syed Moahmmed Khasim <khasim@ti.com> 7 * 8 * (C) Copyright 2002 9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 10 * Marius Groeger <mgroeger@sysgo.de> 11 * Alex Zuepke <azu@sysgo.de> 12 * 13 * (C) Copyright 2002 14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 15 * 16 * See file CREDITS for list of people who contributed to this 17 * project. 18 * 19 * This program is free software; you can redistribute it and/or 20 * modify it under the terms of the GNU General Public License as 21 * published by the Free Software Foundation; either version 2 of 22 * the License, or (at your option) any later version. 23 * 24 * This program is distributed in the hope that it will be useful, 25 * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 * GNU General Public License for more details. 28 * 29 * You should have received a copy of the GNU General Public License 30 * along with this program; if not, write to the Free Software 31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 32 * MA 02111-1307 USA 33 */ 34 35#include <common.h> 36#include <asm/io.h> 37 38static ulong timestamp; 39static ulong lastinc; 40static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; 41 42/* 43 * Nothing really to do with interrupts, just starts up a counter. 44 * We run the counter with 13MHz, divided by 8, resulting in timer 45 * frequency of 1.625MHz. With 32bit counter register, counter 46 * overflows in ~44min 47 */ 48 49/* 13MHz / 8 = 1.625MHz */ 50#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) 51#define TIMER_LOAD_VAL 0xffffffff 52 53int timer_init(void) 54{ 55 /* start the counter ticking up, reload value on overflow */ 56 writel(TIMER_LOAD_VAL, &timer_base->tldr); 57 /* enable timer */ 58 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, 59 &timer_base->tclr); 60 61 reset_timer_masked(); /* init the timestamp and lastinc value */ 62 63 return 0; 64} 65 66/* 67 * timer without interrupts 68 */ 69void reset_timer(void) 70{ 71 reset_timer_masked(); 72} 73 74ulong get_timer(ulong base) 75{ 76 return get_timer_masked() - base; 77} 78 79void set_timer(ulong t) 80{ 81 timestamp = t; 82} 83 84/* delay x useconds */ 85void __udelay(unsigned long usec) 86{ 87 long tmo = usec * (TIMER_CLOCK / 1000) / 1000; 88 unsigned long now, last = readl(&timer_base->tcrr); 89 90 while (tmo > 0) { 91 now = readl(&timer_base->tcrr); 92 if (last > now) /* count up timer overflow */ 93 tmo -= TIMER_LOAD_VAL - last + now; 94 else 95 tmo -= now - last; 96 last = now; 97 } 98} 99 100void reset_timer_masked(void) 101{ 102 /* reset time, capture current incrementer value time */ 103 lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); 104 timestamp = 0; /* start "advancing" time stamp from 0 */ 105} 106 107ulong get_timer_masked(void) 108{ 109 /* current tick value */ 110 ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); 111 112 if (now >= lastinc) /* normal mode (non roll) */ 113 /* move stamp fordward with absoulte diff ticks */ 114 timestamp += (now - lastinc); 115 else /* we have rollover of incrementer */ 116 timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) 117 - lastinc) + now; 118 lastinc = now; 119 return timestamp; 120} 121 122/* 123 * This function is derived from PowerPC code (read timebase as long long). 124 * On ARM it just returns the timer value. 125 */ 126unsigned long long get_ticks(void) 127{ 128 return get_timer(0); 129} 130 131/* 132 * This function is derived from PowerPC code (timebase clock frequency). 133 * On ARM it returns the number of timer ticks per second. 134 */ 135ulong get_tbclk(void) 136{ 137 return CONFIG_SYS_HZ; 138} 139