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54#ifndef IXQMGR_H
55# define IXQMGRQACCESS_C
56#else
57# error
58#endif
59
60
61
62
63
64
65
66
67#include "IxQMgr.h"
68#include "IxQMgrAqmIf_p.h"
69#include "IxQMgrQAccess_p.h"
70#include "IxQMgrQCfg_p.h"
71#include "IxQMgrDefines_p.h"
72
73
74
75
76extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
77
78
79
80
81void
82ixQMgrQAccessInit (void)
83{
84}
85
86IX_STATUS
87ixQMgrQReadWithChecks (IxQMgrQId qId,
88 UINT32 *entry)
89{
90 IxQMgrQEntrySizeInWords entrySizeInWords;
91 IxQMgrQInlinedReadWriteInfo *infoPtr;
92
93 if (NULL == entry)
94 {
95 return IX_QMGR_PARAMETER_ERROR;
96 }
97
98
99 if (!ixQMgrQIsConfigured(qId))
100 {
101 return IX_QMGR_Q_NOT_CONFIGURED;
102 }
103
104
105 entrySizeInWords = ixQMgrQEntrySizeInWordsGet (qId);
106
107 ixQMgrAqmIfQPop (qId, entrySizeInWords, entry);
108
109
110
111
112 infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
113 if (infoPtr->qReadCount-- > infoPtr->qSizeInEntries)
114 {
115 infoPtr->qReadCount = 0;
116 }
117
118
119 if (ixQMgrAqmIfUnderflowCheck (qId))
120 {
121 return IX_QMGR_Q_UNDERFLOW;
122 }
123
124 return IX_SUCCESS;
125}
126
127
128
129
130
131
132
133IX_STATUS
134ixQMgrQReadMWordsMinus1 (IxQMgrQId qId,
135 UINT32 *entry)
136{
137 IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
138 UINT32 entrySize = infoPtr->qEntrySizeInWords;
139 volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
140
141 while (--entrySize)
142 {
143
144 *(++entry) = IX_OSAL_READ_LONG(++qAccRegAddr);
145 }
146
147 if (qId < IX_QMGR_MIN_QUEUPP_QID)
148 {
149
150 UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
151
152
153 if (status & infoPtr->qUflowStatBitMask)
154 {
155
156
157
158 IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
159 status & ~infoPtr->qUflowStatBitMask);
160 return IX_QMGR_Q_UNDERFLOW;
161 }
162 }
163 return IX_SUCCESS;
164}
165
166IX_STATUS
167ixQMgrQWriteWithChecks (IxQMgrQId qId,
168 UINT32 *entry)
169{
170 IxQMgrQEntrySizeInWords entrySizeInWords;
171 IxQMgrQInlinedReadWriteInfo *infoPtr;
172
173 if (NULL == entry)
174 {
175 return IX_QMGR_PARAMETER_ERROR;
176 }
177
178
179 if (!ixQMgrQIsConfigured(qId))
180 {
181 return IX_QMGR_Q_NOT_CONFIGURED;
182 }
183
184
185 entrySizeInWords = ixQMgrQEntrySizeInWordsGet (qId);
186
187 ixQMgrAqmIfQPush (qId, entrySizeInWords, entry);
188
189
190
191
192 infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
193 if (infoPtr->qWriteCount++ >= infoPtr->qSizeInEntries)
194 {
195 infoPtr->qWriteCount = infoPtr->qSizeInEntries;
196 }
197
198
199 if (ixQMgrAqmIfOverflowCheck (qId))
200 {
201 return IX_QMGR_Q_OVERFLOW;
202 }
203
204 return IX_SUCCESS;
205}
206
207IX_STATUS
208ixQMgrQPeek (IxQMgrQId qId,
209 unsigned int entryIndex,
210 UINT32 *entry)
211{
212 unsigned int numEntries;
213
214#ifndef NDEBUG
215 if ((NULL == entry) || (entryIndex >= IX_QMGR_Q_SIZE_INVALID))
216 {
217 return IX_QMGR_PARAMETER_ERROR;
218 }
219
220 if (!ixQMgrQIsConfigured(qId))
221 {
222 return IX_QMGR_Q_NOT_CONFIGURED;
223 }
224#endif
225
226 if (IX_SUCCESS != ixQMgrQNumEntriesGet (qId, &numEntries))
227 {
228 return IX_FAIL;
229 }
230
231 if (entryIndex >= numEntries)
232 {
233 return IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS;
234 }
235
236 return ixQMgrAqmIfQPeek (qId, entryIndex, entry);
237}
238
239IX_STATUS
240ixQMgrQPoke (IxQMgrQId qId,
241 unsigned entryIndex,
242 UINT32 *entry)
243{
244 unsigned int numEntries;
245
246#ifndef NDEBUG
247 if ((NULL == entry) || (entryIndex > 128))
248 {
249 return IX_QMGR_PARAMETER_ERROR;
250 }
251
252 if (!ixQMgrQIsConfigured(qId))
253 {
254 return IX_QMGR_Q_NOT_CONFIGURED;
255 }
256#endif
257
258 if (IX_SUCCESS != ixQMgrQNumEntriesGet (qId, &numEntries))
259 {
260 return IX_FAIL;
261 }
262
263 if (numEntries < (entryIndex + 1))
264 {
265 return IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS;
266 }
267
268 return ixQMgrAqmIfQPoke (qId, entryIndex, entry);
269}
270
271IX_STATUS
272ixQMgrQStatusGetWithChecks (IxQMgrQId qId,
273 IxQMgrQStatus *qStatus)
274{
275 if (NULL == qStatus)
276 {
277 return IX_QMGR_PARAMETER_ERROR;
278 }
279
280 if (!ixQMgrQIsConfigured (qId))
281 {
282 return IX_QMGR_Q_NOT_CONFIGURED;
283 }
284
285 ixQMgrAqmIfQueStatRead (qId, qStatus);
286
287 return IX_SUCCESS;
288}
289
290IX_STATUS
291ixQMgrQNumEntriesGet (IxQMgrQId qId,
292 unsigned *numEntriesPtr)
293{
294 UINT32 qPtrs;
295 UINT32 qStatus;
296 unsigned numEntries;
297 IxQMgrQInlinedReadWriteInfo *infoPtr;
298
299
300#ifndef NDEBUG
301 if (NULL == numEntriesPtr)
302 {
303 return IX_QMGR_PARAMETER_ERROR;
304 }
305
306
307 if (!ixQMgrQIsConfigured(qId))
308 {
309 return IX_QMGR_Q_NOT_CONFIGURED;
310 }
311#endif
312
313
314 infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
315
316
317 qPtrs = IX_OSAL_READ_LONG(infoPtr->qConfigRegAddr);
318
319
320 numEntries = (qPtrs - (qPtrs >> 7)) & 0x7f;
321
322 if (numEntries == 0)
323 {
324
325
326
327
328 ixQMgrAqmIfQueStatRead (qId, &qStatus);
329
330 if (qId < IX_QMGR_MIN_QUEUPP_QID)
331 {
332 if (qStatus & IX_QMGR_Q_STATUS_E_BIT_MASK)
333 {
334
335 *numEntriesPtr = 0;
336 }
337 else if (qStatus & IX_QMGR_Q_STATUS_F_BIT_MASK)
338 {
339
340 *numEntriesPtr = infoPtr->qSizeInEntries;
341 }
342 else
343 {
344
345
346
347
348
349
350 *numEntriesPtr = 0;
351 return IX_QMGR_WARNING;
352 }
353 }
354 else
355 {
356 if (qStatus & IX_QMGR_Q_STATUS_F_BIT_MASK)
357 {
358
359 *numEntriesPtr = infoPtr->qSizeInEntries;
360 }
361 else
362 {
363
364
365
366 *numEntriesPtr = 0;
367 return IX_QMGR_WARNING;
368 }
369 }
370 }
371 else
372 {
373 *numEntriesPtr = (numEntries / infoPtr->qEntrySizeInWords) & (infoPtr->qSizeInEntries - 1);
374 }
375
376 return IX_SUCCESS;
377}
378
379#if defined(__wince) && defined(NO_INLINE_APIS)
380
381PUBLIC IX_STATUS
382ixQMgrQRead (IxQMgrQId qId,
383 UINT32 *entryPtr)
384{
385 extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
386 IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
387 UINT32 entry, entrySize;
388
389
390 entrySize = infoPtr->qEntrySizeInWords;
391 entry = IX_OSAL_READ_LONG(infoPtr->qAccRegAddr);
392
393 if (entrySize != IX_QMGR_Q_ENTRY_SIZE1)
394 {
395 *entryPtr = entry;
396
397 return ixQMgrQReadMWordsMinus1(qId, entryPtr);
398 }
399
400
401 if (qId < IX_QMGR_MIN_QUEUPP_QID)
402 {
403
404
405
406
407 if (infoPtr->qReadCount-- == 0)
408 {
409
410
411
412
413 UINT32 qPtrs;
414
415
416
417
418
419 if (entry == 0)
420 {
421
422 UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
423
424
425 if (status & infoPtr->qUflowStatBitMask)
426 {
427
428
429
430 IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
431 status & ~infoPtr->qUflowStatBitMask);
432 *entryPtr = 0;
433 infoPtr->qReadCount = 0;
434 return IX_QMGR_Q_UNDERFLOW;
435 }
436 }
437
438 *entryPtr = entry;
439
440
441
442
443
444
445
446
447 qPtrs = IX_OSAL_READ_LONG(infoPtr->qConfigRegAddr);
448
449
450 qPtrs = (qPtrs - (qPtrs >> 7)) & 0x7f;
451
452 if (qPtrs == 0)
453 {
454
455 infoPtr->qReadCount = 0;
456 }
457 else
458 {
459
460
461
462 infoPtr->qReadCount = qPtrs & (infoPtr->qSizeInEntries - 1);
463 }
464 return IX_SUCCESS;
465 }
466 }
467 *entryPtr = entry;
468 return IX_SUCCESS;
469}
470
471PUBLIC IX_STATUS
472ixQMgrQBurstRead (IxQMgrQId qId,
473 UINT32 numEntries,
474 UINT32 *entries)
475{
476 extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
477 IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
478 UINT32 nullCheckEntry;
479
480 if (infoPtr->qEntrySizeInWords == IX_QMGR_Q_ENTRY_SIZE1)
481 {
482 volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
483
484
485
486
487
488
489
490
491
492 nullCheckEntry = IX_OSAL_READ_LONG(infoPtr->qAccRegAddr);
493
494
495 while (--numEntries)
496 {
497
498 if (nullCheckEntry == 0)
499 {
500
501 break;
502 }
503 else
504 {
505
506 *entries = nullCheckEntry;
507
508 nullCheckEntry = IX_OSAL_READ_LONG(qAccRegAddr);
509
510 entries++;
511 }
512 }
513
514 *entries = nullCheckEntry;
515 }
516 else
517 {
518 IxQMgrQEntrySizeInWords entrySizeInWords = infoPtr->qEntrySizeInWords;
519
520 nullCheckEntry = 0;
521 while (numEntries--)
522 {
523 int i;
524
525 for (i = 0; i < entrySizeInWords; i++)
526 {
527 *entries = IX_OSAL_READ_LONG(infoPtr->qAccRegAddr + i);
528 nullCheckEntry |= *entries++;
529 }
530
531
532 if (nullCheckEntry == 0)
533 {
534 break;
535 }
536 nullCheckEntry = 0;
537 }
538 }
539
540
541
542
543 infoPtr->qWriteCount = 0;
544
545
546 if (nullCheckEntry == 0 && qId < IX_QMGR_MIN_QUEUPP_QID)
547 {
548
549 UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
550
551 if (status & infoPtr->qUflowStatBitMask)
552 {
553
554 IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
555 status & ~infoPtr->qUflowStatBitMask);
556 return IX_QMGR_Q_UNDERFLOW;
557 }
558 }
559
560 return IX_SUCCESS;
561}
562
563PUBLIC IX_STATUS
564ixQMgrQWrite (IxQMgrQId qId,
565 UINT32 *entry)
566{
567 extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
568 IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
569 UINT32 entrySize;
570
571
572 IX_OSAL_WRITE_LONG(infoPtr->qAccRegAddr, *entry);
573 entrySize = infoPtr->qEntrySizeInWords;
574
575 if (entrySize != IX_QMGR_Q_ENTRY_SIZE1)
576 {
577
578 volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
579 while (--entrySize)
580 {
581 ++entry;
582 IX_OSAL_WRITE_LONG(++qAccRegAddr, *entry);
583 }
584 entrySize = infoPtr->qEntrySizeInWords;
585 }
586
587
588 if (qId < IX_QMGR_MIN_QUEUPP_QID)
589 {
590 UINT32 qSize = infoPtr->qSizeInEntries;
591
592
593
594 if (infoPtr->qWriteCount++ == qSize)
595 {
596
597 UINT32 qPtrs;
598
599
600 UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
601
602
603
604
605 if ((status & infoPtr->qOflowStatBitMask) ||
606 ((status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr))
607 & infoPtr->qOflowStatBitMask))
608 {
609
610
611
612 IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
613 status & ~infoPtr->qOflowStatBitMask);
614 infoPtr->qWriteCount = infoPtr->qSizeInEntries;
615 return IX_QMGR_Q_OVERFLOW;
616 }
617
618
619
620
621
622
623 qPtrs = IX_OSAL_READ_LONG(infoPtr->qConfigRegAddr);
624
625
626 qPtrs = (qPtrs - (qPtrs >> 7)) & 0x7f;
627
628 if (qPtrs == 0)
629 {
630
631
632
633
634 infoPtr->qWriteCount = qSize;
635 }
636 else
637 {
638
639 if (entrySize == IX_QMGR_Q_ENTRY_SIZE1)
640 {
641 infoPtr->qWriteCount = qPtrs & (qSize - 1);
642 }
643 else
644 {
645 infoPtr->qWriteCount = (qPtrs / entrySize) & (qSize - 1);
646 }
647 }
648 }
649 }
650 return IX_SUCCESS;
651}
652
653PUBLIC IX_STATUS
654ixQMgrQBurstWrite (IxQMgrQId qId,
655 unsigned numEntries,
656 UINT32 *entries)
657{
658 extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
659 IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
660 UINT32 status;
661
662
663 infoPtr->qWriteCount += numEntries;
664
665 if (infoPtr->qEntrySizeInWords == IX_QMGR_Q_ENTRY_SIZE1)
666 {
667 volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
668 while (numEntries--)
669 {
670 IX_OSAL_WRITE_LONG(qAccRegAddr, *entries);
671 entries++;
672 }
673 }
674 else
675 {
676 IxQMgrQEntrySizeInWords entrySizeInWords = infoPtr->qEntrySizeInWords;
677 int i;
678
679
680 while (numEntries--)
681 {
682
683 for (i = 0; i < entrySizeInWords; i++)
684 {
685 IX_OSAL_WRITE_LONG((infoPtr->qAccRegAddr + i), *entries);
686 entries++;
687 }
688 }
689 }
690
691
692 if (infoPtr->qWriteCount > infoPtr->qSizeInEntries)
693 {
694
695 infoPtr->qWriteCount = infoPtr->qSizeInEntries;
696 }
697
698
699 if (qId < IX_QMGR_MIN_QUEUPP_QID)
700 {
701
702 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
703
704
705
706
707 if ((status & infoPtr->qOflowStatBitMask) ||
708 ((status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr))
709 & infoPtr->qOflowStatBitMask))
710 {
711
712 IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
713 status & ~infoPtr->qOflowStatBitMask);
714 return IX_QMGR_Q_OVERFLOW;
715 }
716 }
717
718 return IX_SUCCESS;
719}
720
721PUBLIC IX_STATUS
722ixQMgrQStatusGet (IxQMgrQId qId,
723 IxQMgrQStatus *qStatus)
724{
725
726 if (qId < IX_QMGR_MIN_QUEUPP_QID)
727 {
728 extern UINT32 ixQMgrAqmIfQueLowStatRegAddr[];
729 extern UINT32 ixQMgrAqmIfQueLowStatBitsOffset[];
730 extern UINT32 ixQMgrAqmIfQueLowStatBitsMask;
731 extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
732 IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
733 volatile UINT32 *lowStatRegAddr = (UINT32*)ixQMgrAqmIfQueLowStatRegAddr[qId];
734 volatile UINT32 *qUOStatRegAddr = infoPtr->qUOStatRegAddr;
735
736 UINT32 lowStatBitsOffset = ixQMgrAqmIfQueLowStatBitsOffset[qId];
737 UINT32 lowStatBitsMask = ixQMgrAqmIfQueLowStatBitsMask;
738 UINT32 underflowBitMask = infoPtr->qUflowStatBitMask;
739 UINT32 overflowBitMask = infoPtr->qOflowStatBitMask;
740
741
742 *qStatus = IX_OSAL_READ_LONG(lowStatRegAddr);
743
744 *qStatus = (*qStatus >> lowStatBitsOffset) & lowStatBitsMask;
745
746
747 if (IX_OSAL_READ_LONG(qUOStatRegAddr) & overflowBitMask)
748 {
749
750 IX_OSAL_WRITE_LONG(qUOStatRegAddr,
751 (IX_OSAL_READ_LONG(qUOStatRegAddr) &
752 ~overflowBitMask));
753 *qStatus |= IX_QMGR_Q_STATUS_OF_BIT_MASK;
754 }
755
756
757 if (IX_OSAL_READ_LONG(qUOStatRegAddr) & underflowBitMask)
758 {
759
760 IX_OSAL_WRITE_LONG(qUOStatRegAddr,
761 (IX_OSAL_READ_LONG(qUOStatRegAddr) &
762 ~underflowBitMask));
763 *qStatus |= IX_QMGR_Q_STATUS_UF_BIT_MASK;
764 }
765 }
766 else
767 {
768 extern UINT32 ixQMgrAqmIfQueUppStat0RegAddr;
769 extern UINT32 ixQMgrAqmIfQueUppStat1RegAddr;
770 extern UINT32 ixQMgrAqmIfQueUppStat0BitMask[];
771 extern UINT32 ixQMgrAqmIfQueUppStat1BitMask[];
772
773 volatile UINT32 *qNearEmptyStatRegAddr = (UINT32*)ixQMgrAqmIfQueUppStat0RegAddr;
774 volatile UINT32 *qFullStatRegAddr = (UINT32*)ixQMgrAqmIfQueUppStat1RegAddr;
775 int maskIndex = qId - IX_QMGR_MIN_QUEUPP_QID;
776 UINT32 qNearEmptyStatBitMask = ixQMgrAqmIfQueUppStat0BitMask[maskIndex];
777 UINT32 qFullStatBitMask = ixQMgrAqmIfQueUppStat1BitMask[maskIndex];
778
779
780 *qStatus = 0;
781
782
783 if (IX_OSAL_READ_LONG(qNearEmptyStatRegAddr) & qNearEmptyStatBitMask)
784 {
785 *qStatus |= IX_QMGR_Q_STATUS_NE_BIT_MASK;
786 }
787
788
789 if (IX_OSAL_READ_LONG(qFullStatRegAddr) & qFullStatBitMask)
790 {
791 *qStatus |= IX_QMGR_Q_STATUS_F_BIT_MASK;
792 }
793 }
794 return IX_SUCCESS;
795}
796#endif
797