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16#ifndef LM_H
17#define LM_H
18
19#include "bcm570x_queue.h"
20#include "bcm570x_bits.h"
21
22
23
24
25
26typedef char LM_CHAR, *PLM_CHAR;
27typedef unsigned int LM_UINT, *PLM_UINT;
28typedef unsigned char LM_UINT8, *PLM_UINT8;
29typedef unsigned short LM_UINT16, *PLM_UINT16;
30typedef unsigned int LM_UINT32, *PLM_UINT32;
31typedef unsigned int LM_COUNTER, *PLM_COUNTER;
32typedef void LM_VOID, *PLM_VOID;
33typedef char LM_BOOL, *PLM_BOOL;
34
35
36typedef struct {
37#ifdef BIG_ENDIAN_HOST
38 LM_UINT32 High;
39 LM_UINT32 Low;
40#else
41 LM_UINT32 Low;
42 LM_UINT32 High;
43#endif
44} LM_UINT64, *PLM_UINT64;
45
46typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS;
47
48
49#define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \
50 { \
51 LM_UINT32 OrgLow; \
52 \
53 OrgLow = (pAddr)->Low; \
54 (pAddr)->Low += IncSize; \
55 if((pAddr)->Low < OrgLow) { \
56 (pAddr)->High++; \
57 } \
58 }
59
60#ifndef NULL
61#define NULL ((void *) 0)
62#endif
63
64#ifndef OFFSETOF
65#define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m)))
66#endif
67
68
69
70
71
72#define IS_ETH_BROADCAST(_pEthAddr) \
73 (((unsigned char *) (_pEthAddr))[0] == ((unsigned char) 0xff))
74
75#define IS_ETH_MULTICAST(_pEthAddr) \
76 (((unsigned char *) (_pEthAddr))[0] & ((unsigned char) 0x01))
77
78#define IS_ETH_ADDRESS_EQUAL(_pEtherAddr1, _pEtherAddr2) \
79 ((((unsigned char *) (_pEtherAddr1))[0] == \
80 ((unsigned char *) (_pEtherAddr2))[0]) && \
81 (((unsigned char *) (_pEtherAddr1))[1] == \
82 ((unsigned char *) (_pEtherAddr2))[1]) && \
83 (((unsigned char *) (_pEtherAddr1))[2] == \
84 ((unsigned char *) (_pEtherAddr2))[2]) && \
85 (((unsigned char *) (_pEtherAddr1))[3] == \
86 ((unsigned char *) (_pEtherAddr2))[3]) && \
87 (((unsigned char *) (_pEtherAddr1))[4] == \
88 ((unsigned char *) (_pEtherAddr2))[4]) && \
89 (((unsigned char *) (_pEtherAddr1))[5] == \
90 ((unsigned char *) (_pEtherAddr2))[5]))
91
92#define COPY_ETH_ADDRESS(_Src, _Dst) \
93 ((unsigned char *) (_Dst))[0] = ((unsigned char *) (_Src))[0]; \
94 ((unsigned char *) (_Dst))[1] = ((unsigned char *) (_Src))[1]; \
95 ((unsigned char *) (_Dst))[2] = ((unsigned char *) (_Src))[2]; \
96 ((unsigned char *) (_Dst))[3] = ((unsigned char *) (_Src))[3]; \
97 ((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \
98 ((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5];
99
100
101
102
103
104#define ETHERNET_ADDRESS_SIZE 6
105#define ETHERNET_PACKET_HEADER_SIZE 14
106#define MIN_ETHERNET_PACKET_SIZE 64
107#define MAX_ETHERNET_PACKET_SIZE 1518
108#define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60
109#define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514
110#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536
111
112#ifndef LM_MAX_MC_TABLE_SIZE
113#define LM_MAX_MC_TABLE_SIZE 32
114#endif
115#define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1)
116#define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1)
117
118
119#define LM_ACCEPT_UNICAST 0x0001
120#define LM_ACCEPT_MULTICAST 0x0002
121#define LM_ACCEPT_ALL_MULTICAST 0x0004
122#define LM_ACCEPT_BROADCAST 0x0008
123#define LM_ACCEPT_ERROR_PACKET 0x0010
124
125#define LM_PROMISCUOUS_MODE 0x10000
126
127
128
129
130
131#define PCI_VENDOR_ID_REG 0x00
132#define PCI_DEVICE_ID_REG 0x02
133
134#define PCI_COMMAND_REG 0x04
135#define PCI_IO_SPACE_ENABLE 0x0001
136#define PCI_MEM_SPACE_ENABLE 0x0002
137#define PCI_BUSMASTER_ENABLE 0x0004
138#define PCI_MEMORY_WRITE_INVALIDATE 0x0010
139#define PCI_PARITY_ERROR_ENABLE 0x0040
140#define PCI_SYSTEM_ERROR_ENABLE 0x0100
141#define PCI_FAST_BACK_TO_BACK_ENABLE 0x0200
142
143#define PCI_STATUS_REG 0x06
144#define PCI_REV_ID_REG 0x08
145
146#define PCI_CACHE_LINE_SIZE_REG 0x0c
147
148#define PCI_IO_BASE_ADDR_REG 0x10
149#define PCI_IO_BASE_ADDR_MASK 0xfffffff0
150
151#define PCI_MEM_BASE_ADDR_LOW 0x10
152#define PCI_MEM_BASE_ADDR_HIGH 0x14
153
154#define PCI_SUBSYSTEM_VENDOR_ID_REG 0x2c
155#define PCI_SUBSYSTEM_ID_REG 0x2e
156#define PCI_INT_LINE_REG 0x3c
157
158#define PCIX_CAP_REG 0x40
159#define PCIX_ENABLE_RELAXED_ORDERING BIT_17
160
161
162
163
164
165typedef struct {
166 LM_UINT32 FragSize;
167 LM_PHYSICAL_ADDRESS FragBuf;
168} LM_FRAG, *PLM_FRAG;
169
170typedef struct {
171
172
173 LM_UINT32 FragCount;
174
175
176 LM_UINT32 TotalSize;
177
178
179 LM_FRAG Fragments[1];
180} LM_FRAG_LIST, *PLM_FRAG_LIST;
181
182#define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \
183 typedef struct { \
184 LM_FRAG_LIST FragList; \
185 LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \
186 } _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME
187
188
189
190
191
192#define LM_STATUS_SUCCESS 0
193#define LM_STATUS_FAILURE 1
194
195#define LM_STATUS_INTERRUPT_ACTIVE 2
196#define LM_STATUS_INTERRUPT_NOT_ACTIVE 3
197
198#define LM_STATUS_LINK_ACTIVE 4
199#define LM_STATUS_LINK_DOWN 5
200#define LM_STATUS_LINK_SETTING_MISMATCH 6
201
202#define LM_STATUS_TOO_MANY_FRAGMENTS 7
203#define LM_STATUS_TRANSMIT_ABORTED 8
204#define LM_STATUS_TRANSMIT_ERROR 9
205#define LM_STATUS_RECEIVE_ABORTED 10
206#define LM_STATUS_RECEIVE_ERROR 11
207#define LM_STATUS_INVALID_PACKET_SIZE 12
208#define LM_STATUS_OUT_OF_MAP_REGISTERS 13
209#define LM_STATUS_UNKNOWN_ADAPTER 14
210
211typedef LM_UINT LM_STATUS, *PLM_STATUS;
212
213
214
215
216
217#define LM_REQUESTED_MEDIA_TYPE_AUTO 0
218#define LM_REQUESTED_MEDIA_TYPE_BNC 1
219#define LM_REQUESTED_MEDIA_TYPE_UTP_AUTO 2
220#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS 3
221#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX 4
222#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS 5
223#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX 6
224#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS 7
225#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX 8
226#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS 9
227#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX 10
228#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS 11
229#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX 12
230#define LM_REQUESTED_MEDIA_TYPE_MAC_LOOPBACK 0xfffe
231#define LM_REQUESTED_MEDIA_TYPE_PHY_LOOPBACK 0xffff
232
233typedef LM_UINT32 LM_REQUESTED_MEDIA_TYPE, *PLM_REQUESTED_MEDIA_TYPE;
234
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237
238
239#define LM_MEDIA_TYPE_UNKNOWN -1
240#define LM_MEDIA_TYPE_AUTO 0
241#define LM_MEDIA_TYPE_UTP 1
242#define LM_MEDIA_TYPE_BNC 2
243#define LM_MEDIA_TYPE_AUI 3
244#define LM_MEDIA_TYPE_FIBER 4
245
246typedef LM_UINT32 LM_MEDIA_TYPE, *PLM_MEDIA_TYPE;
247
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251
252#define LM_LINE_SPEED_UNKNOWN 0
253#define LM_LINE_SPEED_10MBPS 1
254#define LM_LINE_SPEED_100MBPS 2
255#define LM_LINE_SPEED_1000MBPS 3
256
257typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED;
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262
263#define LM_DUPLEX_MODE_UNKNOWN 0
264#define LM_DUPLEX_MODE_HALF 1
265#define LM_DUPLEX_MODE_FULL 2
266
267typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE;
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272
273#define LM_POWER_STATE_D0 0
274#define LM_POWER_STATE_D1 1
275#define LM_POWER_STATE_D2 2
276#define LM_POWER_STATE_D3 3
277
278typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE;
279
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283
284#define LM_TASK_OFFLOAD_NONE 0x0000
285#define LM_TASK_OFFLOAD_TX_IP_CHECKSUM 0x0001
286#define LM_TASK_OFFLOAD_RX_IP_CHECKSUM 0x0002
287#define LM_TASK_OFFLOAD_TX_TCP_CHECKSUM 0x0004
288#define LM_TASK_OFFLOAD_RX_TCP_CHECKSUM 0x0008
289#define LM_TASK_OFFLOAD_TX_UDP_CHECKSUM 0x0010
290#define LM_TASK_OFFLOAD_RX_UDP_CHECKSUM 0x0020
291#define LM_TASK_OFFLOAD_TCP_SEGMENTATION 0x0040
292
293typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD;
294
295
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297
298
299#define LM_FLOW_CONTROL_NONE 0x00
300#define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01
301#define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02
302#define LM_FLOW_CONTROL_RX_TX_PAUSE (LM_FLOW_CONTROL_RECEIVE_PAUSE | \
303 LM_FLOW_CONTROL_TRANSMIT_PAUSE)
304
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307
308
309#define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000
310
311typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL;
312
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315
316
317#define LM_WAKE_UP_MODE_NONE 0
318#define LM_WAKE_UP_MODE_MAGIC_PACKET 1
319#define LM_WAKE_UP_MODE_NWUF 2
320#define LM_WAKE_UP_MODE_LINK_CHANGE 4
321
322typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE;
323
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325
326
327
328#define LM_COUNTER_FRAMES_XMITTED_OK 0
329#define LM_COUNTER_FRAMES_RECEIVED_OK 1
330#define LM_COUNTER_ERRORED_TRANSMIT_COUNT 2
331#define LM_COUNTER_ERRORED_RECEIVE_COUNT 3
332#define LM_COUNTER_RCV_CRC_ERROR 4
333#define LM_COUNTER_ALIGNMENT_ERROR 5
334#define LM_COUNTER_SINGLE_COLLISION_FRAMES 6
335#define LM_COUNTER_MULTIPLE_COLLISION_FRAMES 7
336#define LM_COUNTER_FRAMES_DEFERRED 8
337#define LM_COUNTER_MAX_COLLISIONS 9
338#define LM_COUNTER_RCV_OVERRUN 10
339#define LM_COUNTER_XMIT_UNDERRUN 11
340#define LM_COUNTER_UNICAST_FRAMES_XMIT 12
341#define LM_COUNTER_MULTICAST_FRAMES_XMIT 13
342#define LM_COUNTER_BROADCAST_FRAMES_XMIT 14
343#define LM_COUNTER_UNICAST_FRAMES_RCV 15
344#define LM_COUNTER_MULTICAST_FRAMES_RCV 16
345#define LM_COUNTER_BROADCAST_FRAMES_RCV 17
346
347typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE;
348
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351
352
353typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK;
354typedef struct _LM_PACKET *PLM_PACKET;
355
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357
358
359
360LM_STATUS LM_GetAdapterInfo (PLM_DEVICE_BLOCK pDevice);
361LM_STATUS LM_InitializeAdapter (PLM_DEVICE_BLOCK pDevice);
362LM_STATUS LM_ResetAdapter (PLM_DEVICE_BLOCK pDevice);
363LM_STATUS LM_DisableInterrupt (PLM_DEVICE_BLOCK pDevice);
364LM_STATUS LM_EnableInterrupt (PLM_DEVICE_BLOCK pDevice);
365LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
366LM_STATUS LM_ServiceInterrupts (PLM_DEVICE_BLOCK pDevice);
367LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice);
368LM_STATUS LM_SetReceiveMask (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask);
369LM_STATUS LM_Halt (PLM_DEVICE_BLOCK pDevice);
370LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice);
371LM_STATUS LM_MulticastAdd (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
372LM_STATUS LM_MulticastDel (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
373LM_STATUS LM_MulticastClear (PLM_DEVICE_BLOCK pDevice);
374LM_STATUS LM_SetMacAddress (PLM_DEVICE_BLOCK pDevice);
375LM_STATUS LM_LoopbackAddress (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress);
376
377LM_UINT32 LM_GetCrcCounter (PLM_DEVICE_BLOCK pDevice);
378
379LM_WAKE_UP_MODE LM_PMCapabilities (PLM_DEVICE_BLOCK pDevice);
380LM_STATUS LM_NwufAdd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
381 LM_UINT8 * pByteMask, LM_UINT8 * pPattern);
382LM_STATUS LM_NwufRemove (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
383 LM_UINT8 * pByteMask, LM_UINT8 * pPattern);
384LM_STATUS LM_SetPowerState (PLM_DEVICE_BLOCK pDevice,
385 LM_POWER_STATE PowerLevel);
386
387LM_VOID LM_ReadPhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
388 PLM_UINT32 pData32);
389LM_VOID LM_WritePhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
390 LM_UINT32 Data32);
391
392LM_STATUS LM_ControlLoopBack (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Control);
393LM_STATUS LM_SetupPhy (PLM_DEVICE_BLOCK pDevice);
394int LM_BlinkLED (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration);
395
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399
400LM_STATUS MM_ReadConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
401 LM_UINT16 * pValue16);
402LM_STATUS MM_WriteConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
403 LM_UINT16 Value16);
404LM_STATUS MM_ReadConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
405 LM_UINT32 * pValue32);
406LM_STATUS MM_WriteConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
407 LM_UINT32 Value32);
408LM_STATUS MM_MapMemBase (PLM_DEVICE_BLOCK pDevice);
409LM_STATUS MM_MapIoBase (PLM_DEVICE_BLOCK pDevice);
410LM_STATUS MM_IndicateRxPackets (PLM_DEVICE_BLOCK pDevice);
411LM_STATUS MM_IndicateTxPackets (PLM_DEVICE_BLOCK pDevice);
412LM_STATUS MM_StartTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
413LM_STATUS MM_CompleteTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
414LM_STATUS MM_AllocateMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
415 PLM_VOID * pMemoryBlockVirt);
416LM_STATUS MM_AllocateSharedMemory (PLM_DEVICE_BLOCK pDevice,
417 LM_UINT32 BlockSize,
418 PLM_VOID * pMemoryBlockVirt,
419 PLM_PHYSICAL_ADDRESS pMemoryBlockPhy,
420 LM_BOOL Cached);
421LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice);
422LM_STATUS MM_IndicateStatus (PLM_DEVICE_BLOCK pDevice, LM_STATUS Status);
423LM_STATUS MM_InitializeUmPackets (PLM_DEVICE_BLOCK pDevice);
424LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
425LM_STATUS MM_CoalesceTxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
426LM_STATUS LM_MbufWorkAround (PLM_DEVICE_BLOCK pDevice);
427LM_STATUS LM_SetLinkSpeed (PLM_DEVICE_BLOCK pDevice,
428 LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
429
430#if INCLUDE_5703_A0_FIX
431LM_STATUS LM_Load5703DmaWFirmware (PLM_DEVICE_BLOCK pDevice);
432#endif
433
434#endif
435
