1#ifndef __ASM_SH_CACHE_H 2#define __ASM_SH_CACHE_H 3 4#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) 5 6int cache_control(unsigned int cmd); 7 8#define L1_CACHE_BYTES 32 9struct __large_struct { unsigned long buf[100]; }; 10#define __m(x) (*(struct __large_struct *)(x)) 11 12void dcache_wback_range(u32 start, u32 end) 13{ 14 u32 v; 15 16 start &= ~(L1_CACHE_BYTES - 1); 17 for (v = start; v < end; v += L1_CACHE_BYTES) { 18 asm volatile ("ocbwb %0" : /* no output */ 19 : "m" (__m(v))); 20 } 21} 22 23void dcache_invalid_range(u32 start, u32 end) 24{ 25 u32 v; 26 27 start &= ~(L1_CACHE_BYTES - 1); 28 for (v = start; v < end; v += L1_CACHE_BYTES) { 29 asm volatile ("ocbi %0" : /* no output */ 30 : "m" (__m(v))); 31 } 32} 33#endif /* CONFIG_SH4 || CONFIG_SH4A */ 34 35#endif /* __ASM_SH_CACHE_H */ 36