1/* 2 * Copyright (C) 2009 Texas Instruments Incorporated 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 20#ifndef __CONFIG_H 21#define __CONFIG_H 22 23#define DAVINCI_DM355LEOPARD 24 25#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ 26#define CONFIG_SKIP_RELOCATE_UBOOT 27#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ 28#define CONFIG_SYS_CONSOLE_INFO_QUIET 29#define CONFIG_DISPLAY_CPUINFO 30 31/* SoC Configuration */ 32#define CONFIG_ARM926EJS /* arm926ejs CPU */ 33#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ 34#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ 35#define CONFIG_SYS_HZ 1000 36#define CONFIG_SOC_DM355 /* DM355 based board */ 37 38/* Memory Info */ 39#define CONFIG_NR_DRAM_BANKS 1 40#define PHYS_SDRAM_1 0x80000000 41#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */ 42 43/* Serial Driver info: UART0 for console */ 44#define CONFIG_SYS_NS16550 45#define CONFIG_SYS_NS16550_SERIAL 46#define CONFIG_SYS_NS16550_REG_SIZE -4 47#define CONFIG_SYS_NS16550_COM1 0x01c20000 48#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK 49#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 50#define CONFIG_CONS_INDEX 1 51#define CONFIG_BAUDRATE 115200 52 53/* Ethernet: external DM9000 */ 54#define CONFIG_DRIVER_DM9000 1 55#define CONFIG_DM9000_BASE 0x04000000 56#define DM9000_IO CONFIG_DM9000_BASE 57#define DM9000_DATA (CONFIG_DM9000_BASE + 16) 58#define CONFIG_NET_MULTI 59 60/* I2C */ 61#define CONFIG_HARD_I2C 62#define CONFIG_DRIVER_DAVINCI_I2C 63#define CONFIG_SYS_I2C_SPEED 400000 64#define CONFIG_SYS_I2C_SLAVE 0x10 65 66/* NAND */ 67#define CONFIG_NAND_DAVINCI 68#define CONFIG_SYS_NAND_CS 2 69#define CONFIG_SYS_NAND_USE_FLASH_BBT 70#define CONFIG_SYS_NAND_HW_ECC 71 72#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } 73#define CONFIG_SYS_MAX_NAND_DEVICE 1 74#define CONFIG_SYS_NAND_MAX_CHIPS 1 75 76/* U-Boot command configuration */ 77#include <config_cmd_default.h> 78 79#undef CONFIG_CMD_BDI 80#undef CONFIG_CMD_FLASH 81#undef CONFIG_CMD_FPGA 82#undef CONFIG_CMD_SETGETDCR 83 84#define CONFIG_CMD_ASKENV 85#define CONFIG_CMD_DHCP 86#define CONFIG_CMD_I2C 87#define CONFIG_CMD_PING 88#define CONFIG_CMD_SAVES 89 90#ifdef CONFIG_NAND_DAVINCI 91#define CONFIG_CMD_MTDPARTS 92#define CONFIG_MTD_PARTITIONS 93#define CONFIG_MTD_DEVICE 94#define CONFIG_CMD_NAND 95#define CONFIG_CMD_UBI 96#define CONFIG_RBTREE 97#endif 98 99#define CONFIG_CRC32_VERIFY 100#define CONFIG_MX_CYCLIC 101 102/* U-Boot general configuration */ 103#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ 104#define CONFIG_BOOTFILE "uImage" /* Boot file name */ 105#define CONFIG_SYS_PROMPT "DM355 LEOPARD # " 106#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 107#define CONFIG_SYS_PBSIZE /* Print buffer size */ \ 108 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 109#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 110#define CONFIG_SYS_HUSH_PARSER 111#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 112#define CONFIG_SYS_LONGHELP 113 114#ifdef CONFIG_NAND_DAVINCI 115#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ 116#define CONFIG_ENV_IS_IN_NAND 117#define CONFIG_ENV_OFFSET 0x3C0000 118#undef CONFIG_ENV_IS_IN_FLASH 119#define CONFIG_ENV_OVERWRITE 120#endif 121 122#define CONFIG_BOOTDELAY 3 123#define CONFIG_BOOTCOMMAND "dhcp;bootm" 124#define CONFIG_BOOTARGS \ 125 "console=ttyS0,115200n8 " \ 126 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" 127 128#define CONFIG_CMDLINE_EDITING 129#define CONFIG_VERSION_VARIABLE 130#define CONFIG_TIMESTAMP 131 132#define CONFIG_NET_RETRY_COUNT 10 133 134/* U-Boot memory configuration */ 135#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 136#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ 137#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ 138#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ 139#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ 140 141/* Linux interfacing */ 142#define CONFIG_CMDLINE_TAG 143#define CONFIG_SETUP_MEMORY_TAGS 144#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ 145#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ 146 147#define MTDIDS_DEFAULT "nand0=davinci_nand.0" 148 149#ifdef CONFIG_SYS_NAND_LARGEPAGE 150#define PART_BOOT "2m(bootloader)ro," 151#else 152/* Assume 16K erase blocks; allow a few bad ones. */ 153#define PART_BOOT "512k(bootloader)ro," 154#endif 155 156#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ 157#define PART_REST "-(filesystem)" 158 159#define MTDPARTS_DEFAULT \ 160 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST 161 162#endif /* __CONFIG_H */ 163