uboot/include/configs/gdppc440etx.h
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   1/*
   2 * (C) Copyright 2008
   3 * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
   4 *
   5 * Based on include/configs/yosemite.h
   6 * (C) Copyright 2005-2007
   7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 */
  27
  28/*
  29 * gdppc440etx.h - configuration for G&D 440EP/GR ETX-Module
  30 */
  31#ifndef __CONFIG_H
  32#define __CONFIG_H
  33
  34/*
  35 * High Level Configuration Options
  36 */
  37#define CONFIG_440GR            1               /* Specific PPC440GR support */
  38#define CONFIG_HOSTNAME         gdppc440etx
  39#define CONFIG_440              1               /* ... PPC440 family         */
  40#define CONFIG_4xx              1               /* ... PPC4xx family         */
  41#define CONFIG_SYS_CLK_FREQ     66666666        /* external freq to pll      */
  42
  43/*
  44 * Include common defines/options for all AMCC eval boards
  45 */
  46#include "amcc-common.h"
  47
  48#define CONFIG_BOARD_EARLY_INIT_F       1       /* call board_early_init_f*/
  49#define CONFIG_MISC_INIT_R              1       /* call misc_init_r()     */
  50
  51/*
  52 * Base addresses -- Note these are effective addresses where the
  53 * actual resources get mapped (not physical addresses)
  54 */
  55#define CONFIG_SYS_FLASH_BASE           0xfc000000      /* start of FLASH    */
  56#define CONFIG_SYS_PCI_MEMBASE          0xa0000000      /* mapped pci memory */
  57#define CONFIG_SYS_PCI_MEMBASE1         CONFIG_SYS_PCI_MEMBASE  + 0x10000000
  58#define CONFIG_SYS_PCI_MEMBASE2         CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
  59#define CONFIG_SYS_PCI_MEMBASE3         CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
  60
  61/*Don't change either of these*/
  62#define CONFIG_SYS_PERIPHERAL_BASE      0xef600000      /* internal peripheral*/
  63#define CONFIG_SYS_PCI_BASE             0xe0000000      /* internal PCI regs */
  64/*Don't change either of these*/
  65
  66#define CONFIG_SYS_USB_DEVICE           0x50000000
  67#define CONFIG_SYS_BOOT_BASE_ADDR       0xf0000000
  68
  69/*
  70 * Initial RAM & stack pointer (placed in SDRAM)
  71 */
  72#define CONFIG_SYS_INIT_RAM_DCACHE      1               /* d-cache as init ram*/
  73#define CONFIG_SYS_INIT_RAM_ADDR        0x70000000      /* DCache             */
  74#define CONFIG_SYS_INIT_RAM_END         (4 << 10)
  75#define CONFIG_SYS_GBL_DATA_SIZE        256             /* num bytes init data*/
  76#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END \
  77                                         - CONFIG_SYS_GBL_DATA_SIZE)
  78#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  79
  80/*
  81 * Serial Port
  82 */
  83#define CONFIG_SYS_EXT_SERIAL_CLOCK     11059200        /* ext. 11.059MHz clk */
  84#define CONFIG_UART1_CONSOLE
  85
  86/*
  87 * Environment
  88 * Define here the location of the environment variables (FLASH or EEPROM).
  89 * Note: DENX encourages to use redundant environment in FLASH.
  90 */
  91#define CONFIG_ENV_IS_IN_FLASH          1               /* FLASH for env. vars*/
  92
  93/*
  94 * FLASH related
  95 */
  96#define CONFIG_SYS_FLASH_CFI                    /* The flash is CFI compatible*/
  97#define CONFIG_FLASH_CFI_DRIVER                 /* Use common CFI driver      */
  98#define CONFIG_SYS_FLASH_CFI_AMD_RESET  1       /* AMD RESET for STM 29W320DB!*/
  99
 100#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 101#define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors/chip */
 102
 103#define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout/Flash Erase (in ms)*/
 104#define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout/Flash Write (in ms)*/
 105
 106#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1/* use buffered writes (20x faster)*/
 107
 108#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
 109
 110#ifdef CONFIG_ENV_IS_IN_FLASH
 111#define CONFIG_ENV_SECT_SIZE            0x20000 /* size of one complete sector*/
 112#define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
 113#define CONFIG_ENV_SIZE                 0x2000 /* Total Size of Env. Sector */
 114
 115/* Address and size of Redundant Environment Sector */
 116#define CONFIG_ENV_ADDR_REDUND          (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 117#define CONFIG_ENV_SIZE_REDUND          (CONFIG_ENV_SIZE)
 118#endif /* CONFIG_ENV_IS_IN_FLASH */
 119
 120/*
 121 * DDR SDRAM
 122 */
 123#undef CONFIG_SPD_EEPROM                /* Don't use SPD EEPROM for setup*/
 124#define CONFIG_SYS_KBYTES_SDRAM         (128 * 1024)    /* 128MB         */
 125#define CONFIG_SYS_SDRAM_BANKS          (2)
 126
 127#define CONFIG_SDRAM_BANK0
 128#define CONFIG_SDRAM_BANK1
 129
 130#define CONFIG_SYS_SDRAM0_TR0           0x410a4012
 131#define CONFIG_SYS_SDRAM0_WDDCTR        0x40000000
 132#define CONFIG_SYS_SDRAM0_RTR           0x04080000
 133#define CONFIG_SYS_SDRAM0_CFG0          0x80000000
 134
 135#undef CONFIG_SDRAM_ECC
 136
 137/*
 138 * I2C
 139 */
 140#define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed+slave address*/
 141
 142/*
 143 * Default environment variables
 144 */
 145#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 146        CONFIG_AMCC_DEF_ENV                                             \
 147        CONFIG_AMCC_DEF_ENV_POWERPC                                     \
 148        CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
 149        "kernel_addr=fc000000\0"                                        \
 150        "ramdisk_addr=fc180000\0"                                       \
 151        ""
 152
 153#define CONFIG_HAS_ETH1                 1       /* add support for "eth1addr" */
 154#define CONFIG_PHY_ADDR                 1
 155#define CONFIG_PHY1_ADDR                3
 156
 157#ifdef DEBUG
 158#define CONFIG_PANIC_HANG
 159#endif
 160
 161/*
 162 * Commands additional to the ones defined in amcc-common.h
 163 */
 164#define CONFIG_CMD_PCI
 165#undef CONFIG_CMD_EEPROM
 166
 167/*
 168 * PCI stuff
 169 */
 170
 171/* General PCI */
 172#define CONFIG_PCI                              /* include pci support        */
 173#undef  CONFIG_PCI_PNP                          /* do (not) pci plug-and-play */
 174#define CONFIG_PCI_SCAN_SHOW                    /* show pci devices on startup*/
 175#define CONFIG_SYS_PCI_TARGBASE         0x80000000      /* PCIaddr mapped to \
 176                                                        CONFIG_SYS_PCI_MEMBASE*/
 177
 178/* Board-specific PCI */
 179#define CONFIG_SYS_PCI_TARGET_INIT
 180#define CONFIG_SYS_PCI_MASTER_INIT
 181
 182#define CONFIG_SYS_PCI_SUBSYS_VENDORID  0x10e8  /* AMCC */
 183#define CONFIG_SYS_PCI_SUBSYS_ID        0xcafe  /* tbd */
 184
 185/*
 186 * External Bus Controller (EBC) Setup
 187 */
 188#define CONFIG_SYS_FLASH                CONFIG_SYS_FLASH_BASE
 189
 190/* Memory Bank 0 (NOR-FLASH) initialization */
 191#define CONFIG_SYS_EBC_PB0AP            0x03017200
 192#define CONFIG_SYS_EBC_PB0CR            (CONFIG_SYS_FLASH | 0xda000)
 193
 194#endif  /* __CONFIG_H */
 195