1/* 2 * (C) Copyright 2004 Paul Reynolds <PaulReynolds@lhsolutions.com> 3 * 4 * (C) Copyright 2005 5 * Stefan Roese, DENX Software Engineering, sr@denx.de. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26/************************************************************************ 27 * 1 March 2004 Travis B. Sawyer <tsawyer@sandburst.com> 28 * Adapted to current Das U-Boot source 29 ***********************************************************************/ 30 31 32/************************************************************************ 33 * OCOTEA.h - configuration for AMCC 440GX Ref (Ocotea) 34 ***********************************************************************/ 35 36#ifndef __CONFIG_H 37#define __CONFIG_H 38 39/*----------------------------------------------------------------------- 40 * High Level Configuration Options 41 *----------------------------------------------------------------------*/ 42#define CONFIG_OCOTEA 1 /* Board is ebony */ 43#define CONFIG_440GX 1 /* Specifc GX support */ 44#define CONFIG_440 1 /* ... PPC440 family */ 45#define CONFIG_4xx 1 /* ... PPC4xx family */ 46#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ 47#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ 48 49/* 50 * Include common defines/options for all AMCC eval boards 51 */ 52#define CONFIG_HOSTNAME ocotea 53#include "amcc-common.h" 54 55/*----------------------------------------------------------------------- 56 * Base addresses -- Note these are effective addresses where the 57 * actual resources get mapped (not physical addresses) 58 *----------------------------------------------------------------------*/ 59#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */ 60#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ 61#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */ 62#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ 63#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ 64 65#define CONFIG_SYS_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08300000) 66#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000) 67 68/*----------------------------------------------------------------------- 69 * Initial RAM & stack pointer (placed in internal SRAM) 70 *----------------------------------------------------------------------*/ 71#define CONFIG_SYS_TEMP_STACK_OCM 1 72#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE 73#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */ 74#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ 75#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ 76 77#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 78#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) 79#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR 80 81/*----------------------------------------------------------------------- 82 * Serial Port 83 *----------------------------------------------------------------------*/ 84#undef CONFIG_SERIAL_SOFTWARE_FIFO 85#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */ 86 87/*----------------------------------------------------------------------- 88 * Environment 89 *----------------------------------------------------------------------*/ 90/* 91 * Define here the location of the environment variables (FLASH or NVRAM). 92 * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only 93 * supported for backward compatibility. 94 */ 95#if 1 96#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ 97#else 98#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ 99#endif 100 101 102/*----------------------------------------------------------------------- 103 * NVRAM/RTC 104 * 105 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located. 106 * The DS1743 code assumes this condition (i.e. -- it assumes the base 107 * address for the RTC registers is: 108 * 109 * CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE 110 * 111 *----------------------------------------------------------------------*/ 112#define CONFIG_SYS_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs */ 113#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */ 114 115#ifdef CONFIG_ENV_IS_IN_NVRAM 116#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */ 117#define CONFIG_ENV_ADDR \ 118 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) 119#endif /* CONFIG_ENV_IS_IN_NVRAM */ 120 121/*----------------------------------------------------------------------- 122 * FLASH related 123 *----------------------------------------------------------------------*/ 124#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* number of banks */ 125#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ 126 127#undef CONFIG_SYS_FLASH_CHECKSUM 128#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 129#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 130 131#define CONFIG_SYS_FLASH_ADDR0 0x5555 132#define CONFIG_SYS_FLASH_ADDR1 0x2aaa 133#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char 134 135#ifdef CONFIG_ENV_IS_IN_FLASH 136#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ 137#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) 138#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ 139 140/* Address and size of Redundant Environment Sector */ 141#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) 142#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 143#endif /* CONFIG_ENV_IS_IN_FLASH */ 144 145/*----------------------------------------------------------------------- 146 * DDR SDRAM 147 *----------------------------------------------------------------------*/ 148#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ 149#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */ 150#define CONFIG_PROG_SDRAM_TLB 1 /* setup SDRAM TLB's dynamically*/ 151 152/*----------------------------------------------------------------------- 153 * I2C 154 *----------------------------------------------------------------------*/ 155#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ 156 157#define CONFIG_SYS_I2C_MULTI_EEPROMS 158#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) 159#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 160#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 161#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 162 163/* 164 * Default environment variables 165 */ 166#define CONFIG_EXTRA_ENV_SETTINGS \ 167 CONFIG_AMCC_DEF_ENV \ 168 CONFIG_AMCC_DEF_ENV_PPC \ 169 CONFIG_AMCC_DEF_ENV_NOR_UPD \ 170 "kernel_addr=fff00000\0" \ 171 "ramdisk_addr=fff10000\0" \ 172 "" 173 174#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */ 175#define CONFIG_PHY1_ADDR 2 176#define CONFIG_PHY2_ADDR 0x10 177#define CONFIG_PHY3_ADDR 0x18 178#define CONFIG_HAS_ETH0 179#define CONFIG_HAS_ETH1 180#define CONFIG_HAS_ETH2 181#define CONFIG_HAS_ETH3 182#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */ 183#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ 184#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ 185#define CONFIG_PHY_RESET_DELAY 1000 186 187/* 188 * Commands additional to the ones defined in amcc-common.h 189 */ 190#define CONFIG_CMD_DATE 191#define CONFIG_CMD_PCI 192#define CONFIG_CMD_SDRAM 193#define CONFIG_CMD_SNTP 194 195/*----------------------------------------------------------------------- 196 * PCI stuff 197 *----------------------------------------------------------------------- 198 */ 199/* General PCI */ 200#define CONFIG_PCI /* include pci support */ 201#define CONFIG_PCI_PNP /* do pci plug-and-play */ 202#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 203#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ 204 205/* Board-specific PCI */ 206#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */ 207 208#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ 209#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */ 210 211#endif /* __CONFIG_H */ 212