LXR uboot/board/netstar/netstar.c

   1/*
   2 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
   3 *
   4 * See file CREDITS for list of people who contributed to this
   5 * project.
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 of
  10 * the License, or (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 * MA 02111-1307 USA
  21 */
  22
  23#include <common.h>
  24#include <netdev.h>
  25#include <i2c.h>
  26#include <flash.h>
  27#include <nand.h>
  28
  29#include <asm/io.h>
  30
  31DECLARE_GLOBAL_DATA_PTR;
  32
  33int board_init(void)
  34{
  35        /* arch number of NetStar board */
  36        gd->bd->bi_arch_number = MACH_TYPE_NETSTAR;
  37
  38        /* adress of boot parameters */
  39        gd->bd->bi_boot_params = 0x10000100;
  40
  41        return 0;
  42}
  43
  44int dram_init(void)
  45{
  46        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  47        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  48
  49        /* Take the Ethernet controller out of reset and wait
  50         * for the EEPROM load to complete. */
  51        *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80;
  52        udelay(10);     /* doesn't work before timer_init call */
  53        *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80;
  54        udelay(500);
  55
  56        return 0;
  57}
  58
  59int misc_init_r(void)
  60{
  61#if defined(CONFIG_RTC_DS1307)
  62        /* enable trickle charge */
  63        i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, 0x10, 0xaa);
  64#endif
  65        return 0;
  66}
  67
  68int board_late_init(void)
  69{
  70        return 0;
  71}
  72
  73#if defined(CONFIG_CMD_FLASH)
  74ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t * info)
  75{
  76        if (banknum == 0) {     /* AM29LV800 boot flash */
  77                info->portwidth = FLASH_CFI_16BIT;
  78                info->chipwidth = FLASH_CFI_BY16;
  79                info->interface = FLASH_CFI_X16;
  80                return 1;
  81        }
  82
  83        return 0;
  84}
  85#endif
  86
  87#if defined(CONFIG_CMD_NAND)
  88/*
  89 *      hardware specific access to control-lines
  90 *
  91 *      NAND_NCE: bit 0 - don't care
  92 *      NAND_CLE: bit 1 -> bit 1  (0x0002)
  93 *      NAND_ALE: bit 2 -> bit 2  (0x0004)
  94 */
  95static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd,
  96        unsigned int ctrl)
  97{
  98        struct nand_chip *chip = mtd->priv;
  99        unsigned long mask;
 100
 101        if (cmd == NAND_CMD_NONE)
 102                return;
 103
 104        mask = (ctrl & NAND_CLE) ? 0x02 : 0;
 105        if (ctrl & NAND_ALE)
 106                mask |= 0x04;
 107        writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
 108}
 109
 110int board_nand_init(struct nand_chip *nand)
 111{
 112        nand->options = NAND_SAMSUNG_LP_OPTIONS;
 113        nand->ecc.mode = NAND_ECC_SOFT;
 114        nand->cmd_ctrl = netstar_nand_hwcontrol;
 115        nand->chip_delay = 400;
 116        return 0;
 117}
 118#endif
 119
 120#ifdef CONFIG_CMD_NET
 121int board_eth_init(bd_t *bis)
 122{
 123        int rc = 0;
 124#ifdef CONFIG_SMC91111
 125        rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 126#endif
 127        return rc;
 128}
 129#endif
 130