1/* 2 * (C) Copyright 2004 3 * DAVE Srl 4 * 5 * http://www.dave-tech.it 6 * http://www.wawnet.biz 7 * mailto:info@wawnet.biz 8 * 9 * Configuation settings for the B2 board. 10 * 11 * See file CREDITS for list of people who contributed to this 12 * project. 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License as 16 * published by the Free Software Foundation; either version 2 of 17 * the License, or (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 27 * MA 02111-1307 USA 28 */ 29 30#ifndef __CONFIG_H 31#define __CONFIG_H 32 33/* 34 * High Level Configuration Options 35 * (easy to change) 36 */ 37#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ 38#define CONFIG_B2 1 /* on an B2 Board */ 39#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */ 40#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ 41#define CONFIG_SYS_NO_CP15_CACHE 42#define CONFIG_ARCH_CPU_INIT 43 44#define CONFIG_S3C44B0_CLOCK_SPEED 75 /* we have a 75Mhz S3C44B0*/ 45 46 47#undef CONFIG_USE_IRQ /* don't need them anymore */ 48 49 50/* 51 * Size of malloc() pool 52 */ 53#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ 54#define CONFIG_ENV_SIZE 1024 /* 1024 bytes may be used for env vars*/ 55#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024 ) 56#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 57 58/* 59 * Hardware drivers 60 */ 61#define CONFIG_LAN91C96 62#define CONFIG_LAN91C96_BASE 0x04000300 /* base address */ 63#define CONFIG_SMC_USE_32_BIT 64#undef CONFIG_SHOW_ACTIVITY 65#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ 66 67/* 68 * select serial console configuration 69 */ 70#define CONFIG_S3C44B0_SERIAL 71#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ 72 73#define CONFIG_S3C44B0_I2C 74#define CONFIG_RTC_S3C44B0 75 76/* allow to overwrite serial and ethaddr */ 77#define CONFIG_ENV_OVERWRITE 78 79#define CONFIG_BAUDRATE 115200 80 81/* 82 * BOOTP options 83 */ 84#define CONFIG_BOOTP_SUBNETMASK 85#define CONFIG_BOOTP_GATEWAY 86#define CONFIG_BOOTP_HOSTNAME 87#define CONFIG_BOOTP_BOOTPATH 88#define CONFIG_BOOTP_BOOTFILESIZE 89 90 91/* 92 * Command line configuration. 93 */ 94#include <config_cmd_default.h> 95 96#define CONFIG_CMD_DATE 97#define CONFIG_CMD_ELF 98#define CONFIG_CMD_EEPROM 99#define CONFIG_CMD_I2C 100 101#define CONFIG_NET_MULTI 102#define CONFIG_BOOTDELAY 5 103#define CONFIG_ETHADDR 00:50:c2:1e:af:fb 104#define CONFIG_BOOTARGS "setenv bootargs root=/dev/ram ip=192.168.0.70:::::eth0:off \ 105 ether=25,0,0,0,eth0 ethaddr=00:50:c2:1e:af:fb" 106#define CONFIG_NETMASK 255.255.0.0 107#define CONFIG_IPADDR 192.168.0.70 108#define CONFIG_SERVERIP 192.168.0.23 109#define CONFIG_BOOTFILE "B2-rootfs/usr/B2-zImage.u-boot" 110#define CONFIG_BOOTCOMMAND "bootm 20000 f0000" 111 112/* 113 * Miscellaneous configurable options 114 */ 115#define CONFIG_SYS_LONGHELP /* undef to save memory */ 116#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 117#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 118#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 119#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 120#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 121 122#define CONFIG_SYS_MEMTEST_START 0x0C400000 /* memtest works on */ 123#define CONFIG_SYS_MEMTEST_END 0x0C800000 /* 4 ... 8 MB in DRAM */ 124 125#define CONFIG_SYS_LOAD_ADDR 0x0c700000 /* default load address */ 126 127#define CONFIG_SYS_HZ 1000 /* 1 kHz */ 128 129 /* valid baudrates */ 130#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 131 132/*----------------------------------------------------------------------- 133 * Stack sizes 134 * 135 * The stack sizes are set up in start.S using the settings below 136 */ 137#define CONFIG_STACKSIZE (128*1024) /* regular stack */ 138#ifdef CONFIG_USE_IRQ 139#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 140#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 141#endif 142 143/*----------------------------------------------------------------------- 144 * Physical Memory Map 145 */ 146#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */ 147#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ 148#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ 149 150#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 151#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ 152 153#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 154 155/*----------------------------------------------------------------------- 156 * FLASH and environment organization 157 */ 158/*----------------------------------------------------------------------- 159 * FLASH organization 160 */ 161#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 162#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 163 164#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 165#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */ 166 167#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size (width) */ 168#define CONFIG_SYS_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */ 169#define CONFIG_SYS_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */ 170/* 171 * The following defines are added for buggy IOP480 byte interface. 172 * All other boards should use the standard values (CPCI405 etc.) 173 */ 174#define CONFIG_SYS_FLASH_READ0 0x0000 /* 0 is standard */ 175#define CONFIG_SYS_FLASH_READ1 0x0001 /* 1 is standard */ 176#define CONFIG_SYS_FLASH_READ2 0x0002 /* 2 is standard */ 177 178#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 179 180/*----------------------------------------------------------------------- 181 * Environment Variable setup 182 */ 183#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ 184#define CONFIG_ENV_OFFSET 0x0 /* environment starts at the beginning of the EEPROM */ 185 186/*----------------------------------------------------------------------- 187 * I2C EEPROM (STM24C02W6) for environment 188 */ 189#define CONFIG_HARD_I2C /* I2c with hardware support */ 190#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ 191#define CONFIG_SYS_I2C_SLAVE 0xFE 192 193#define CONFIG_SYS_I2C_EEPROM_ADDR 0xA8 /* EEPROM STM24C02W6 */ 194#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ 195/* mask of address bits that overflow into the "EEPROM chip address" */ 196/*#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07*/ 197#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* The Catalyst CAT24WC08 has */ 198 /* 16 byte page write mode using*/ 199 /* last 4 bits of the address */ 200#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ 201 202/* Flash banks JFFS2 should use */ 203/* 204#define CONFIG_SYS_JFFS2_FIRST_BANK 0 205#define CONFIG_SYS_JFFS2_FIRST_SECTOR 2 206#define CONFIG_SYS_JFFS2_NUM_BANKS 1 207*/ 208 209/* 210 Linux TAGs (see arch/arm/lib/armlinux.c) 211*/ 212#define CONFIG_CMDLINE_TAG 213#undef CONFIG_SETUP_MEMORY_TAGS 214#define CONFIG_INITRD_TAG 215 216#endif /* __CONFIG_H */ 217